arm_bl31_setup.c 9.12 KB
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/*
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 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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 *
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 * SPDX-License-Identifier: BSD-3-Clause
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 */

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#include <assert.h>

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#include <arch.h>
#include <arch_helpers.h>
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#include <common/bl_common.h>
#include <common/debug.h>
#include <drivers/console.h>
#include <lib/extensions/ras.h>
#include <lib/mmio.h>
#include <lib/utils.h>
#include <lib/xlat_tables/xlat_tables_compat.h>
#include <plat/common/platform.h>
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#include <platform_def.h>
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#include <plat_arm.h>

/*
 * Placeholder variables for copying the arguments that have been passed to
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 * BL31 from BL2.
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 */
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;

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#if !RESET_TO_BL31
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/*
 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page
 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2.
 */
CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows);
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#endif
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/* Weak definitions may be overridden in specific ARM standard platform */
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#pragma weak bl31_early_platform_setup2
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#pragma weak bl31_platform_setup
#pragma weak bl31_plat_arch_setup
#pragma weak bl31_plat_get_next_image_ep_info

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#define MAP_BL31_TOTAL		MAP_REGION_FLAT(			\
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					BL31_START,			\
					BL31_END - BL31_START,		\
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					MT_MEMORY | MT_RW | MT_SECURE)
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#if RECLAIM_INIT_CODE
IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE);
IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END);

#define MAP_BL_INIT_CODE	MAP_REGION_FLAT(			\
					BL_INIT_CODE_BASE,		\
					BL_INIT_CODE_END		\
						- BL_INIT_CODE_BASE,	\
					MT_CODE | MT_SECURE)
#endif
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/*******************************************************************************
 * Return a pointer to the 'entry_point_info' structure of the next image for the
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 * security state specified. BL33 corresponds to the non-secure image type
 * while BL32 corresponds to the secure image type. A NULL pointer is returned
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 * if the image does not exist.
 ******************************************************************************/
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struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type)
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{
	entry_point_info_t *next_image_info;

	assert(sec_state_is_valid(type));
	next_image_info = (type == NON_SECURE)
			? &bl33_image_ep_info : &bl32_image_ep_info;
	/*
	 * None of the images on the ARM development platforms can have 0x0
	 * as the entrypoint
	 */
	if (next_image_info->pc)
		return next_image_info;
	else
		return NULL;
}

/*******************************************************************************
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 * Perform any BL31 early platform setup common to ARM standard platforms.
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 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
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 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be
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 * done before the MMU is initialized so that the memory layout can be used
 * while creating page tables. BL2 has flushed this information to memory, so
 * we are guaranteed to pick up good data.
 ******************************************************************************/
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void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
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				uintptr_t hw_config, void *plat_params_from_bl2)
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{
	/* Initialize the console to provide early debug support */
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	arm_console_boot_init();
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#if RESET_TO_BL31
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	/* There are no parameters from BL2 if BL31 is a reset vector */
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	assert(from_bl2 == NULL);
	assert(plat_params_from_bl2 == NULL);

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# ifdef BL32_BASE
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	/* Populate entry point information for BL32 */
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	SET_PARAM_HEAD(&bl32_image_ep_info,
				PARAM_EP,
				VERSION_1,
				0);
	SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
	bl32_image_ep_info.pc = BL32_BASE;
	bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
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# endif /* BL32_BASE */
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	/* Populate entry point information for BL33 */
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	SET_PARAM_HEAD(&bl33_image_ep_info,
				PARAM_EP,
				VERSION_1,
				0);
	/*
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	 * Tell BL31 where the non-trusted software image
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	 * is located and the entry state information
	 */
	bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
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	bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry();
	SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);

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# if ARM_LINUX_KERNEL_AS_BL33
	/*
	 * According to the file ``Documentation/arm64/booting.txt`` of the
	 * Linux kernel tree, Linux expects the physical address of the device
	 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
	 * must be 0.
	 */
	bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE;
	bl33_image_ep_info.args.arg1 = 0U;
	bl33_image_ep_info.args.arg2 = 0U;
	bl33_image_ep_info.args.arg3 = 0U;
# endif

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#else /* RESET_TO_BL31 */

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	/*
	 * In debug builds, we pass a special value in 'plat_params_from_bl2'
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	 * to verify platform parameters from BL2 to BL31.
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	 * In release builds, it's not used.
	 */
	assert(((unsigned long long)plat_params_from_bl2) ==
		ARM_BL31_PLAT_PARAM_VAL);

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	/*
	 * Check params passed from BL2 should not be NULL,
	 */
	bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
	assert(params_from_bl2 != NULL);
	assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
	assert(params_from_bl2->h.version >= VERSION_2);

	bl_params_node_t *bl_params = params_from_bl2->head;

	/*
	 * Copy BL33 and BL32 (if present), entry point information.
	 * They are stored in Secure RAM, in BL2's address space.
	 */
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	while (bl_params != NULL) {
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		if (bl_params->image_id == BL32_IMAGE_ID)
			bl32_image_ep_info = *bl_params->ep_info;

		if (bl_params->image_id == BL33_IMAGE_ID)
			bl33_image_ep_info = *bl_params->ep_info;

		bl_params = bl_params->next_params_info;
	}

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	if (bl33_image_ep_info.pc == 0U)
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		panic();
#endif /* RESET_TO_BL31 */
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}

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void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
		u_register_t arg2, u_register_t arg3)
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{
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	arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
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	/*
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	 * Initialize Interconnect for this cluster during cold boot.
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	 * No need for locks as no other CPU is active.
	 */
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	plat_arm_interconnect_init();
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	/*
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	 * Enable Interconnect coherency for the primary CPU's cluster.
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	 * Earlier bootloader stages might already do this (e.g. Trusted
	 * Firmware's BL1 does it) but we can't assume so. There is no harm in
	 * executing this code twice anyway.
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	 * Platform specific PSCI code will enable coherency for other
	 * clusters.
	 */
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	plat_arm_interconnect_enter_coherency();
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}

/*******************************************************************************
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 * Perform any BL31 platform setup common to ARM standard platforms
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 ******************************************************************************/
void arm_bl31_platform_setup(void)
{
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	/* Initialize the GIC driver, cpu and distributor interfaces */
	plat_arm_gic_driver_init();
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	plat_arm_gic_init();

#if RESET_TO_BL31
	/*
	 * Do initial security configuration to allow DRAM/device access
	 * (if earlier BL has not already done so).
	 */
	plat_arm_security_setup();

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#if defined(PLAT_ARM_MEM_PROT_ADDR)
	arm_nor_psci_do_dyn_mem_protect();
#endif /* PLAT_ARM_MEM_PROT_ADDR */

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#endif /* RESET_TO_BL31 */

	/* Enable and initialize the System level generic timer */
	mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
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			CNTCR_FCREQ(0U) | CNTCR_EN);
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	/* Allow access to the System counter timer module */
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	arm_configure_sys_timer();
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	/* Initialize power controller before setting up topology */
	plat_arm_pwrc_setup();
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#if RAS_EXTENSION
	ras_init();
#endif
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}

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/*******************************************************************************
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 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
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 * standard platforms
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 * Perform BL31 platform setup
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 ******************************************************************************/
void arm_bl31_plat_runtime_setup(void)
{
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#if MULTI_CONSOLE_API
	console_switch_state(CONSOLE_FLAG_RUNTIME);
#else
	console_uninit();
#endif

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	/* Initialize the runtime console */
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	arm_console_runtime_init();
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#if RECLAIM_INIT_CODE
	arm_free_init_memory();
#endif
}

#if RECLAIM_INIT_CODE
/*
 * Zero out and make RW memory used to store image boot time code so it can
 * be reclaimed during runtime
 */
void arm_free_init_memory(void)
{
	int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE,
				BL_INIT_CODE_END - BL_INIT_CODE_BASE,
				MT_RW_DATA);

	if (ret != 0) {
		ERROR("Could not reclaim initialization code");
		panic();
	}
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}
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#endif
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void __init bl31_platform_setup(void)
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{
	arm_bl31_platform_setup();
}

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void bl31_plat_runtime_setup(void)
{
	arm_bl31_plat_runtime_setup();
}

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/*******************************************************************************
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 * Perform the very early platform specific architectural setup shared between
 * ARM standard platforms. This only does basic initialization. Later
 * architectural setup (bl31_arch_setup()) does not do anything platform
 * specific.
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 ******************************************************************************/
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void __init arm_bl31_plat_arch_setup(void)
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{
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	const mmap_region_t bl_regions[] = {
		MAP_BL31_TOTAL,
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#if RECLAIM_INIT_CODE
		MAP_BL_INIT_CODE,
#endif
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		ARM_MAP_BL_RO,
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#if USE_ROMLIB
		ARM_MAP_ROMLIB_CODE,
		ARM_MAP_ROMLIB_DATA,
#endif
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#if USE_COHERENT_MEM
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		ARM_MAP_BL_COHERENT_RAM,
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#endif
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		{0}
	};

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	setup_page_tables(bl_regions, plat_arm_get_mmap());
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	enable_mmu_el3(0);
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	arm_setup_romlib();
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}

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void __init bl31_plat_arch_setup(void)
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{
	arm_bl31_plat_arch_setup();
}