mce.h 2.28 KB
Newer Older
1
/*
Anthony Zhou's avatar
Anthony Zhou committed
2
 * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
3
 *
dp-arm's avatar
dp-arm committed
4
 * SPDX-License-Identifier: BSD-3-Clause
5
6
7
8
9
10
11
12
13
14
15
16
 */

#ifndef __MCE_H__
#define __MCE_H__

#include <mmio.h>
#include <tegra_def.h>

/*******************************************************************************
 * MCE commands
 ******************************************************************************/
typedef enum mce_cmd {
Anthony Zhou's avatar
Anthony Zhou committed
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
	MCE_CMD_ENTER_CSTATE = 0U,
	MCE_CMD_UPDATE_CSTATE_INFO = 1U,
	MCE_CMD_UPDATE_CROSSOVER_TIME = 2U,
	MCE_CMD_READ_CSTATE_STATS = 3U,
	MCE_CMD_WRITE_CSTATE_STATS = 4U,
	MCE_CMD_IS_SC7_ALLOWED = 5U,
	MCE_CMD_ONLINE_CORE = 6U,
	MCE_CMD_CC3_CTRL = 7U,
	MCE_CMD_ECHO_DATA = 8U,
	MCE_CMD_READ_VERSIONS = 9U,
	MCE_CMD_ENUM_FEATURES = 10U,
	MCE_CMD_ROC_FLUSH_CACHE_TRBITS = 11U,
	MCE_CMD_ENUM_READ_MCA = 12U,
	MCE_CMD_ENUM_WRITE_MCA = 13U,
	MCE_CMD_ROC_FLUSH_CACHE = 14U,
	MCE_CMD_ROC_CLEAN_CACHE = 15U,
	MCE_CMD_ENABLE_LATIC = 16U,
	MCE_CMD_UNCORE_PERFMON_REQ = 17U,
	MCE_CMD_MISC_CCPLEX = 18U,
	MCE_CMD_IS_CCX_ALLOWED = 0xFEU,
	MCE_CMD_MAX = 0xFFU,
38
39
} mce_cmd_t;

Anthony Zhou's avatar
Anthony Zhou committed
40
#define MCE_CMD_MASK				0xFFU
41
42
43
44

/*******************************************************************************
 * Timeout value used to powerdown a core
 ******************************************************************************/
Anthony Zhou's avatar
Anthony Zhou committed
45
#define MCE_CORE_SLEEP_TIME_INFINITE		0xFFFFFFFFU
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76

/*******************************************************************************
 * Struct to prepare UPDATE_CSTATE_INFO request
 ******************************************************************************/
typedef struct mce_cstate_info {
	/* cluster cstate value */
	uint32_t cluster;
	/* ccplex cstate value */
	uint32_t ccplex;
	/* system cstate value */
	uint32_t system;
	/* force system state? */
	uint8_t system_state_force;
	/* wake mask value */
	uint32_t wake_mask;
	/* update the wake mask? */
	uint8_t update_wake_mask;
} mce_cstate_info_t;

/* public interfaces */
int mce_command_handler(mce_cmd_t cmd, uint64_t arg0, uint64_t arg1,
		uint64_t arg2);
int mce_update_reset_vector(void);
int mce_update_gsc_videomem(void);
int mce_update_gsc_tzdram(void);
int mce_update_gsc_tzram(void);
__dead2 void mce_enter_ccplex_state(uint32_t state_idx);
void mce_update_cstate_info(mce_cstate_info_t *cstate);
void mce_verify_firmware_version(void);

#endif /* __MCE_H__ */