cci.c 3.73 KB
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/*
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 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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 *
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 * SPDX-License-Identifier: BSD-3-Clause
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 */

#include <arch.h>
#include <assert.h>
#include <cci.h>
#include <debug.h>
#include <mmio.h>
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#include <stdint.h>
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#define MAKE_CCI_PART_NUMBER(hi, lo)	((hi << 8) | lo)
#define CCI_PART_LO_MASK		0xff
#define CCI_PART_HI_MASK		0xf

/* CCI part number codes read from Peripheral ID registers 0 and 1 */
#define CCI400_PART_NUM		0x420
#define CCI500_PART_NUM		0x422
#define CCI550_PART_NUM		0x423

#define CCI400_SLAVE_PORTS	5
#define CCI500_SLAVE_PORTS	7
#define CCI550_SLAVE_PORTS	7

static uintptr_t cci_base;
static const int *cci_slave_if_map;
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#if ENABLE_ASSERTIONS
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static unsigned int max_master_id;
static int cci_num_slave_ports;

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static int validate_cci_map(const int *map)
{
	unsigned int valid_cci_map = 0;
	int slave_if_id;
	int i;

	/* Validate the map */
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	for (i = 0; i <= max_master_id; i++) {
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		slave_if_id = map[i];

		if (slave_if_id < 0)
			continue;

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		if (slave_if_id >= cci_num_slave_ports) {
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			ERROR("Slave interface ID is invalid\n");
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			return 0;
		}

		if (valid_cci_map & (1 << slave_if_id)) {
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			ERROR("Multiple masters are assigned same slave interface ID\n");
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			return 0;
		}
		valid_cci_map |= 1 << slave_if_id;
	}

	if (!valid_cci_map) {
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		ERROR("No master is assigned a valid slave interface\n");
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		return 0;
	}

	return 1;
}
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/*
 * Read CCI part number from Peripheral ID registers
 */
static unsigned int read_cci_part_number(uintptr_t base)
{
	unsigned int part_lo, part_hi;

	part_lo = mmio_read_32(base + PERIPHERAL_ID0) & CCI_PART_LO_MASK;
	part_hi = mmio_read_32(base + PERIPHERAL_ID1) & CCI_PART_HI_MASK;

	return MAKE_CCI_PART_NUMBER(part_hi, part_lo);
}

/*
 * Identify a CCI device, and return the number of slaves. Return -1 for an
 * unidentified device.
 */
static int get_slave_ports(unsigned int part_num)
{
	/* Macro to match CCI products */
#define RET_ON_MATCH(product) \
	case CCI ## product ## _PART_NUM: \
		return CCI ## product ## _SLAVE_PORTS

	switch (part_num) {

	RET_ON_MATCH(400);
	RET_ON_MATCH(500);
	RET_ON_MATCH(550);

	default:
		return -1;
	}

#undef RET_ON_MATCH
}
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#endif /* ENABLE_ASSERTIONS */
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void cci_init(uintptr_t base, const int *map, unsigned int num_cci_masters)
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{
	assert(map);
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	assert(base);
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	cci_base = base;
	cci_slave_if_map = map;
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#if ENABLE_ASSERTIONS
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	/*
	 * Master Id's are assigned from zero, So in an array of size n
	 * the max master id is (n - 1).
	 */
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	max_master_id = num_cci_masters - 1;
	cci_num_slave_ports = get_slave_ports(read_cci_part_number(base));
#endif
	assert(cci_num_slave_ports >= 0);
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	assert(validate_cci_map(map));
}

void cci_enable_snoop_dvm_reqs(unsigned int master_id)
{
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	int slave_if_id = cci_slave_if_map[master_id];
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	assert(master_id <= max_master_id);
	assert((slave_if_id < cci_num_slave_ports) && (slave_if_id >= 0));
	assert(cci_base);
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	/*
	 * Enable Snoops and DVM messages, no need for Read/Modify/Write as
	 * rest of bits are write ignore
	 */
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	mmio_write_32(cci_base +
		      SLAVE_IFACE_OFFSET(slave_if_id) + SNOOP_CTRL_REG,
		      DVM_EN_BIT | SNOOP_EN_BIT);
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	/* Wait for the dust to settle down */
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	while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT)
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		;
}

void cci_disable_snoop_dvm_reqs(unsigned int master_id)
{
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	int slave_if_id = cci_slave_if_map[master_id];
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	assert(master_id <= max_master_id);
	assert((slave_if_id < cci_num_slave_ports) && (slave_if_id >= 0));
	assert(cci_base);
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	/*
	 * Disable Snoops and DVM messages, no need for Read/Modify/Write as
	 * rest of bits are write ignore.
	 */
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	mmio_write_32(cci_base +
		      SLAVE_IFACE_OFFSET(slave_if_id) + SNOOP_CTRL_REG,
		      ~(DVM_EN_BIT | SNOOP_EN_BIT));
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	/* Wait for the dust to settle down */
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	while (mmio_read_32(cci_base + STATUS_REG) & CHANGE_PENDING_BIT)
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		;
}