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Cortex N1 erratum 1946160 is a Cat B erratum present in r0p0, r1p0,
r2p0, r3p0, r3p1, r4p0, and r4p1.  The workaround is to insert a DMB ST
before acquire atomic instructions without release semantics.  This
issue is present starting from r0p0 but this workaround applies to
revisions r3p0, r3p1, r4p0, and r4p1, for previous revisions there is no
workaround.

SDEN can be found here:
https://documentation-service.arm.com/static/5fa9304cd8dacc30eded464f

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I36e4d6728c275f1c2477dcee9b351077cf7c53e4