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Sandrine Bailleux authored
Previous patches have made it possible to specify the physical and virtual address spaces sizes for each translation context. However, there are still some places in the code where the physical (resp. virtual) address space size is assumed to be PLAT_PHY_ADDR_SPACE_SIZE (resp. PLAT_VIRT_ADDR_SPACE_SIZE). This patch removes them and reads the relevant address space size from the translation context itself instead. This information is now passed in argument to the enable_mmu_arch() function, which needs it to configure the TCR_ELx.T0SZ field (in AArch64) or the TTBCR.T0SZ field (in AArch32) appropriately. Change-Id: I20b0e68b03a143e998695d42911d9954328a06aa Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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