• David Cunado's avatar
    Address edge case for stale PSCI CPU data in cache · 71341d23
    David Cunado authored
    
    
    There is a theoretical edge case during CPU_ON where the cache
    may contain stale data for the target CPU data - this can occur
    under the following conditions:
    
    - the target CPU is in another cluster from the current
    - the target CPU was the last CPU to shutdown on its cluster
    - the cluster was removed from coherency as part of the CPU shutdown
    
    In this case the cache maintenace that was performed as part of the
    target CPUs shutdown was not seen by the current CPU's cluster. And
    so the cache may contain stale data for the target CPU.
    
    This patch adds a cache maintenance operation (flush) for the
    cache-line containing the target CPU data - this ensures that the
    target CPU data is read from main memory.
    
    Change-Id: If8cfd42639b03174f60669429b7f7a757027d0fb
    Signed-off-by: default avatarDavid Cunado <david.cunado@arm.com>
    71341d23
psci_on.c 6.9 KB