• Varun Wadekar's avatar
    Tegra: implement FIQ interrupt handler · 78e2bd10
    Varun Wadekar authored
    
    
    This patch adds a handler for FIQ interrupts triggered when
    the CPU is in the NS world. The handler stores the NS world's
    context along with ELR_EL3/SPSR_EL3.
    
    The NS world driver issues an SMC initially to register it's
    handler. The monitor firmware stores this handler address and
    jumps to it when the FIQ interrupt fires. Upon entry into the
    NS world the driver then issues another SMC to get the CPU
    context when the FIQ fired. This allows the NS world driver to
    determine the CPU state and call stack when the interrupt
    fired. Generally, systems register watchdog interrupts as FIQs
    which are then used to get the CPU state during hangs/crashes.
    
    Change-Id: I733af61a08d1318c75acedbe9569a758744edd0c
    Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
    78e2bd10
tegra_sip_calls.c 4.78 KB