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adam.huang
Arm Trusted Firmware
Commits
01fc3f73
Commit
01fc3f73
authored
Jan 25, 2016
by
danh-arm
Browse files
Merge pull request #495 from jcastillo-arm/jc/tf-issues/170
ARM plat: add build option to unlock access to non-secure timer
parents
84091c48
0e5dcdd2
Changes
3
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docs/user-guide.md
View file @
01fc3f73
...
...
@@ -456,6 +456,12 @@ map is explained in the [Firmware Design].
Trusted Watchdog may be disabled at build time for testing or development
purposes.
*
`ARM_CONFIG_CNTACR`
: boolean option to unlock access to the CNTBase
<N>
frame registers by setting the CNTCTLBase.CNTACR
<N>
register bits. The
frame number
<N>
is defined by 'PLAT_ARM_NSTIMER_FRAME_ID', which should
match the frame used by the Non-Secure image (normally the Linux kernel).
Default is true (access to the frame is allowed).
#### ARM CSS platform specific build options
*
`CSS_DETECT_PRE_1_7_0_SCP`
: Boolean flag to detect SCP version
...
...
plat/arm/common/aarch64/arm_common.c
View file @
01fc3f73
...
...
@@ -151,10 +151,12 @@ void arm_configure_sys_timer(void)
{
unsigned
int
reg_val
;
#if ARM_CONFIG_CNTACR
reg_val
=
(
1
<<
CNTACR_RPCT_SHIFT
)
|
(
1
<<
CNTACR_RVCT_SHIFT
);
reg_val
|=
(
1
<<
CNTACR_RFRQ_SHIFT
)
|
(
1
<<
CNTACR_RVOFF_SHIFT
);
reg_val
|=
(
1
<<
CNTACR_RWVT_SHIFT
)
|
(
1
<<
CNTACR_RWPT_SHIFT
);
mmio_write_32
(
ARM_SYS_TIMCTL_BASE
+
CNTACR_BASE
(
PLAT_ARM_NSTIMER_FRAME_ID
),
reg_val
);
#endif
/* ARM_CONFIG_CNTACR */
reg_val
=
(
1
<<
CNTNSAR_NS_SHIFT
(
PLAT_ARM_NSTIMER_FRAME_ID
));
mmio_write_32
(
ARM_SYS_TIMCTL_BASE
+
CNTNSAR
,
reg_val
);
...
...
plat/arm/common/arm_common.mk
View file @
01fc3f73
...
...
@@ -72,6 +72,11 @@ endif
$(eval
$(call
assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
$(eval
$(call
add_define,ARM_DISABLE_TRUSTED_WDOG))
# Process ARM_CONFIG_CNTACR
ARM_CONFIG_CNTACR
:=
1
$(eval
$(call
assert_boolean,ARM_CONFIG_CNTACR))
$(eval
$(call
add_define,ARM_CONFIG_CNTACR))
PLAT_INCLUDES
+=
-Iinclude
/common/tbbr
\
-Iinclude
/plat/arm/common
\
-Iinclude
/plat/arm/common/aarch64
...
...
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