diff --git a/drivers/renesas/rcar/watchdog/swdt.c b/drivers/renesas/rcar/watchdog/swdt.c index 6df47b9b68cb752f4fabf30c52a4229591c147c0..f9dbf86fe40b9dff65ce63d44ff109b8203e6f06 100644 --- a/drivers/renesas/rcar/watchdog/swdt.c +++ b/drivers/renesas/rcar/watchdog/swdt.c @@ -72,9 +72,9 @@ static void swdt_disable(void) void rcar_swdt_init(void) { - uint32_t rmsk, val, sr; + uint32_t rmsk, sr; #if (RCAR_LSI != RCAR_E3) - uint32_t reg, product_cut, chk_data; + uint32_t reg, val, product_cut, chk_data; reg = mmio_read_32(RCAR_PRR); product_cut = reg & (RCAR_PRODUCT_MASK | RCAR_CUT_MASK); diff --git a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c index 800105ee89f537bd79ea6a8c77f201337b13cb22..716d15d18dc5041abcdd8eb77b0f7a7f24f1eda8 100644 --- a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c +++ b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c @@ -1046,7 +1046,7 @@ uint32_t recovery_from_backup_mode(void) } else { NOTICE("[COLD_BOOT]"); } /* ddrBackup */ - err=dram_update_boot_status(ddrBackup); + err=rcar_dram_update_boot_status(ddrBackup); if(err){ NOTICE("[BOOT_STATUS_UPDATE_ERROR]"); return INITDRAM_ERR_I; @@ -1500,7 +1500,7 @@ if (pdqsr_ctl == 1){ /******************************************************************************* * DDR Initialize entry for IPL ******************************************************************************/ -int32_t InitDram(void) +int32_t rcar_dram_init(void) { uint32_t dataL; uint32_t failcount; @@ -1516,7 +1516,7 @@ int32_t InitDram(void) NOTICE("BL2: DDR1856(%s)", RCAR_E3_DDR_VERSION); } /* ddr */ - dram_get_boot_status(&ddrBackup); + rcar_dram_get_boot_status(&ddrBackup); if(ddrBackup==DRAM_BOOT_STATUS_WARM){ dataL=recovery_from_backup_mode(); /* WARM boot */ diff --git a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.h b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.h index b202b028014afcde62f6f95ae14a931a1abe841a..115765b13864e3720ee59975b0af4646cb51eb1e 100644 --- a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.h +++ b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.h @@ -24,7 +24,7 @@ #endif #endif -extern int32_t InitDram(void); +extern int32_t rcar_dram_init(void); #define INITDRAM_OK (0) #define INITDRAM_NG (0xffffffff) #define INITDRAM_ERR_I (0xffffffff) diff --git a/plat/renesas/rcar/bl2_cpg_init.c b/plat/renesas/rcar/bl2_cpg_init.c index eb533cef555cc126d2185214458c271f9b45dfa7..880ad360450176d2057dd71e834859784afc19c1 100644 --- a/plat/renesas/rcar/bl2_cpg_init.c +++ b/plat/renesas/rcar/bl2_cpg_init.c @@ -42,7 +42,8 @@ static void bl2_secure_cpg_init(void) uint32_t stop_cr2, reset_cr2; #if (RCAR_LSI == RCAR_E3) - reset_cr2 = 0x10000000U stop_cr2 = 0xEFFFFFFFU; + reset_cr2 = 0x10000000U; + stop_cr2 = 0xEFFFFFFFU; #else reset_cr2 = 0x14000000U; stop_cr2 = 0xEBFFFFFFU;