Commit 0d4ad1fe authored by Mark Dykes's avatar Mark Dykes Committed by TrustedFirmware Code Review
Browse files

Merge "plat/arm: Use common build flag for using generic sp804 driver" into integration

parents c84539f2 fddfb3ba
...@@ -914,6 +914,7 @@ $(eval $(call assert_boolean,ENCRYPT_BL32)) ...@@ -914,6 +914,7 @@ $(eval $(call assert_boolean,ENCRYPT_BL32))
$(eval $(call assert_boolean,ERRATA_SPECULATIVE_AT)) $(eval $(call assert_boolean,ERRATA_SPECULATIVE_AT))
$(eval $(call assert_boolean,RAS_TRAP_LOWER_EL_ERR_ACCESS)) $(eval $(call assert_boolean,RAS_TRAP_LOWER_EL_ERR_ACCESS))
$(eval $(call assert_boolean,COT_DESC_IN_DTB)) $(eval $(call assert_boolean,COT_DESC_IN_DTB))
$(eval $(call assert_boolean,USE_SP804_TIMER))
$(eval $(call assert_numeric,ARM_ARCH_MAJOR)) $(eval $(call assert_numeric,ARM_ARCH_MAJOR))
$(eval $(call assert_numeric,ARM_ARCH_MINOR)) $(eval $(call assert_numeric,ARM_ARCH_MINOR))
...@@ -995,6 +996,7 @@ $(eval $(call add_define,USE_SPINLOCK_CAS)) ...@@ -995,6 +996,7 @@ $(eval $(call add_define,USE_SPINLOCK_CAS))
$(eval $(call add_define,ERRATA_SPECULATIVE_AT)) $(eval $(call add_define,ERRATA_SPECULATIVE_AT))
$(eval $(call add_define,RAS_TRAP_LOWER_EL_ERR_ACCESS)) $(eval $(call add_define,RAS_TRAP_LOWER_EL_ERR_ACCESS))
$(eval $(call add_define,COT_DESC_IN_DTB)) $(eval $(call add_define,COT_DESC_IN_DTB))
$(eval $(call add_define,USE_SP804_TIMER))
ifeq (${SANITIZE_UB},trap) ifeq (${SANITIZE_UB},trap)
$(eval $(call add_define,MONITOR_TRAPS)) $(eval $(call add_define,MONITOR_TRAPS))
......
...@@ -725,6 +725,10 @@ Common build options ...@@ -725,6 +725,10 @@ Common build options
path on the host machine which is used to build certificate generation and path on the host machine which is used to build certificate generation and
firmware encryption tool. firmware encryption tool.
- ``USE_SP804_TIMER``: Use the SP804 timer instead of the Generic Timer for
functions that wait for an arbitrary time length (udelay and mdelay). The
default value is 0.
GICv3 driver options GICv3 driver options
-------------------- --------------------
......
...@@ -123,10 +123,6 @@ Arm FVP Platform Specific Build Options ...@@ -123,10 +123,6 @@ Arm FVP Platform Specific Build Options
- ``FVP_GICV2`` : The GICv2 only driver is selected - ``FVP_GICV2`` : The GICv2 only driver is selected
- ``FVP_GICV3`` : The GICv3 only driver is selected (default option) - ``FVP_GICV3`` : The GICv3 only driver is selected (default option)
- ``FVP_USE_SP804_TIMER`` : Use the SP804 timer instead of the Generic Timer
for functions that wait for an arbitrary time length (udelay and mdelay).
The default value is 0.
- ``FVP_HW_CONFIG_DTS`` : Specify the path to the DTS file to be compiled - ``FVP_HW_CONFIG_DTS`` : Specify the path to the DTS file to be compiled
to DTB and packaged in FIP as the HW_CONFIG. See :ref:`Firmware Design` for to DTB and packaged in FIP as the HW_CONFIG. See :ref:`Firmware Design` for
details on HW_CONFIG. By default, this is initialized to a sensible DTS details on HW_CONFIG. By default, this is initialized to a sensible DTS
......
...@@ -311,3 +311,6 @@ COT_DESC_IN_DTB := 0 ...@@ -311,3 +311,6 @@ COT_DESC_IN_DTB := 0
# Build option to provide openssl directory path # Build option to provide openssl directory path
OPENSSL_DIR := /usr OPENSSL_DIR := /usr
# Build option to use the SP804 timer instead of the generic one
USE_SP804_TIMER := 0
...@@ -420,7 +420,7 @@ int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size) ...@@ -420,7 +420,7 @@ int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
void fvp_timer_init(void) void fvp_timer_init(void)
{ {
#if FVP_USE_SP804_TIMER #if USE_SP804_TIMER
/* Enable the clock override for SP804 timer 0, which means that no /* Enable the clock override for SP804 timer 0, which means that no
* clock dividers are applied and the raw (35MHz) clock will be used. * clock dividers are applied and the raw (35MHz) clock will be used.
*/ */
...@@ -435,5 +435,5 @@ void fvp_timer_init(void) ...@@ -435,5 +435,5 @@ void fvp_timer_init(void)
/* Enable System level generic timer */ /* Enable System level generic timer */
mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
CNTCR_FCREQ(0U) | CNTCR_EN); CNTCR_FCREQ(0U) | CNTCR_EN);
#endif /* FVP_USE_SP804_TIMER */ #endif /* USE_SP804_TIMER */
} }
...@@ -7,9 +7,6 @@ ...@@ -7,9 +7,6 @@
# Use the GICv3 driver on the FVP by default # Use the GICv3 driver on the FVP by default
FVP_USE_GIC_DRIVER := FVP_GICV3 FVP_USE_GIC_DRIVER := FVP_GICV3
# Use the SP804 timer instead of the generic one
FVP_USE_SP804_TIMER := 0
# Default cluster count for FVP # Default cluster count for FVP
FVP_CLUSTER_COUNT := 2 FVP_CLUSTER_COUNT := 2
...@@ -21,9 +18,6 @@ FVP_MAX_PE_PER_CPU := 1 ...@@ -21,9 +18,6 @@ FVP_MAX_PE_PER_CPU := 1
FVP_DT_PREFIX := fvp-base-gicv3-psci FVP_DT_PREFIX := fvp-base-gicv3-psci
$(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
$(eval $(call add_define,FVP_USE_SP804_TIMER))
# The FVP platform depends on this macro to build with correct GIC driver. # The FVP platform depends on this macro to build with correct GIC driver.
$(eval $(call add_define,FVP_USE_GIC_DRIVER)) $(eval $(call add_define,FVP_USE_GIC_DRIVER))
...@@ -155,7 +149,7 @@ BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ ...@@ -155,7 +149,7 @@ BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
${FVP_CPU_LIBS} \ ${FVP_CPU_LIBS} \
${FVP_INTERCONNECT_SOURCES} ${FVP_INTERCONNECT_SOURCES}
ifeq (${FVP_USE_SP804_TIMER},1) ifeq (${USE_SP804_TIMER},1)
BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
else else
BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
...@@ -182,14 +176,14 @@ BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ ...@@ -182,14 +176,14 @@ BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
${FVP_INTERCONNECT_SOURCES} ${FVP_INTERCONNECT_SOURCES}
endif endif
ifeq (${FVP_USE_SP804_TIMER},1) ifeq (${USE_SP804_TIMER},1)
BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
endif endif
BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
${FVP_SECURITY_SOURCES} ${FVP_SECURITY_SOURCES}
ifeq (${FVP_USE_SP804_TIMER},1) ifeq (${USE_SP804_TIMER},1)
BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
endif endif
...@@ -223,7 +217,7 @@ endif ...@@ -223,7 +217,7 @@ endif
endif endif
ifeq (${FVP_USE_SP804_TIMER},1) ifeq (${USE_SP804_TIMER},1)
BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
else else
BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
......
...@@ -25,7 +25,7 @@ void bl2_platform_setup(void) ...@@ -25,7 +25,7 @@ void bl2_platform_setup(void)
{ {
arm_bl2_platform_setup(); arm_bl2_platform_setup();
#ifdef FVP_VE_USE_SP804_TIMER #if USE_SP804_TIMER
/* /*
* Enable the clock override for SP804 timer 0, which means that no * Enable the clock override for SP804 timer 0, which means that no
* clock dividers are applied and the raw (35 MHz) clock will be used * clock dividers are applied and the raw (35 MHz) clock will be used
...@@ -37,5 +37,5 @@ void bl2_platform_setup(void) ...@@ -37,5 +37,5 @@ void bl2_platform_setup(void)
SP804_TIMER_CLKMULT, SP804_TIMER_CLKDIV); SP804_TIMER_CLKMULT, SP804_TIMER_CLKDIV);
#else #else
generic_delay_timer_init(); generic_delay_timer_init();
#endif /* FVP_VE_USE_SP804_TIMER */ #endif /* USE_SP804_TIMER */
} }
...@@ -6,8 +6,7 @@ ...@@ -6,8 +6,7 @@
ifdef ARM_CORTEX_A5 ifdef ARM_CORTEX_A5
# Use the SP804 timer instead of the generic one # Use the SP804 timer instead of the generic one
FVP_VE_USE_SP804_TIMER := 1 USE_SP804_TIMER := 1
$(eval $(call add_define,FVP_VE_USE_SP804_TIMER))
BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
endif endif
......
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