Commit 1083b2b3 authored by Antonio Nino Diaz's avatar Antonio Nino Diaz
Browse files

PSCI: Fix types of definitions



Also change header guards to fix defects of MISRA C-2012 Rule 21.1.

Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57
Acked-by: default avatarSumit Garg <sumit.garg@linaro.org>
Acked-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
parent bef9a10f
/* /*
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __PLATFORM_DEF_H__ #ifndef PLATFORM_DEF_H
#define __PLATFORM_DEF_H__ #define PLATFORM_DEF_H
#include <arch.h> #include <arch.h>
#include <common_def.h> #include <common_def.h>
...@@ -58,13 +58,13 @@ ...@@ -58,13 +58,13 @@
* This macro defines the deepest retention state possible. A higher state * This macro defines the deepest retention state possible. A higher state
* id will represent an invalid or a power down state. * id will represent an invalid or a power down state.
*/ */
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE U(1)
/* /*
* This macro defines the deepest power down states possible. Any state ID * This macro defines the deepest power down states possible. Any state ID
* higher than this is invalid. * higher than this is invalid.
*/ */
#define PLAT_MAX_OFF_STATE 2 #define PLAT_MAX_OFF_STATE U(2)
/******************************************************************************* /*******************************************************************************
* Platform memory map related constants * Platform memory map related constants
...@@ -123,4 +123,4 @@ ...@@ -123,4 +123,4 @@
#define PSRAM_DO_DDR_RESUME 0 #define PSRAM_DO_DDR_RESUME 0
#define PSRAM_CHECK_WAKEUP_CPU 0 #define PSRAM_CHECK_WAKEUP_CPU 0
#endif /* __PLATFORM_DEF_H__ */ #endif /* PLATFORM_DEF_H */
/* /*
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __PLATFORM_DEF_H__ #ifndef PLATFORM_DEF_H
#define __PLATFORM_DEF_H__ #define PLATFORM_DEF_H
#include <arch.h> #include <arch.h>
#include <common_def.h> #include <common_def.h>
#include <rk3368_def.h> #include <rk3368_def.h>
#include <utils_def.h>
#define DEBUG_XLAT_TABLE 0 #define DEBUG_XLAT_TABLE 0
...@@ -58,13 +59,13 @@ ...@@ -58,13 +59,13 @@
* This macro defines the deepest retention state possible. A higher state * This macro defines the deepest retention state possible. A higher state
* id will represent an invalid or a power down state. * id will represent an invalid or a power down state.
*/ */
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE U(1)
/* /*
* This macro defines the deepest power down states possible. Any state ID * This macro defines the deepest power down states possible. Any state ID
* higher than this is invalid. * higher than this is invalid.
*/ */
#define PLAT_MAX_OFF_STATE 2 #define PLAT_MAX_OFF_STATE U(2)
/******************************************************************************* /*******************************************************************************
* Platform memory map related constants * Platform memory map related constants
...@@ -125,4 +126,4 @@ ...@@ -125,4 +126,4 @@
#define PSRAM_DO_DDR_RESUME 0 #define PSRAM_DO_DDR_RESUME 0
#define PSRAM_CHECK_WAKEUP_CPU 0 #define PSRAM_CHECK_WAKEUP_CPU 0
#endif /* __PLATFORM_DEF_H__ */ #endif /* PLATFORM_DEF_H */
/* /*
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __PLATFORM_DEF_H__ #ifndef PLATFORM_DEF_H
#define __PLATFORM_DEF_H__ #define PLATFORM_DEF_H
#include <arch.h> #include <arch.h>
#include <bl31_param.h> #include <bl31_param.h>
#include <common_def.h> #include <common_def.h>
#include <rk3399_def.h> #include <rk3399_def.h>
#include <utils_def.h>
#define DEBUG_XLAT_TABLE 0 #define DEBUG_XLAT_TABLE 0
...@@ -57,13 +58,13 @@ ...@@ -57,13 +58,13 @@
* This macro defines the deepest retention state possible. A higher state * This macro defines the deepest retention state possible. A higher state
* id will represent an invalid or a power down state. * id will represent an invalid or a power down state.
*/ */
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE U(1)
/* /*
* This macro defines the deepest power down states possible. Any state ID * This macro defines the deepest power down states possible. Any state ID
* higher than this is invalid. * higher than this is invalid.
*/ */
#define PLAT_MAX_OFF_STATE 2 #define PLAT_MAX_OFF_STATE U(2)
/******************************************************************************* /*******************************************************************************
* Platform specific page table and MMU setup constants * Platform specific page table and MMU setup constants
...@@ -110,4 +111,4 @@ ...@@ -110,4 +111,4 @@
#define PSRAM_DO_DDR_RESUME 1 #define PSRAM_DO_DDR_RESUME 1
#define PSRAM_CHECK_WAKEUP_CPU 0 #define PSRAM_CHECK_WAKEUP_CPU 0
#endif /* __PLATFORM_DEF_H__ */ #endif /* PLATFORM_DEF_H */
...@@ -4,10 +4,11 @@ ...@@ -4,10 +4,11 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __PLATFORM_DEF_H__ #ifndef PLATFORM_DEF_H
#define __PLATFORM_DEF_H__ #define PLATFORM_DEF_H
#include <common_def.h> #include <common_def.h>
#include <utils_def.h>
/* CPU topology */ /* CPU topology */
#define PLAT_MAX_CORES_PER_CLUSTER 2 #define PLAT_MAX_CORES_PER_CLUSTER 2
...@@ -15,9 +16,9 @@ ...@@ -15,9 +16,9 @@
#define PLATFORM_CORE_COUNT (PLAT_CLUSTER_COUNT * \ #define PLATFORM_CORE_COUNT (PLAT_CLUSTER_COUNT * \
PLAT_MAX_CORES_PER_CLUSTER) PLAT_MAX_CORES_PER_CLUSTER)
#define PLAT_MAX_PWR_LVL 1 #define PLAT_MAX_PWR_LVL U(1)
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE U(1)
#define PLAT_MAX_OFF_STATE 2 #define PLAT_MAX_OFF_STATE U(2)
#define SQ_LOCAL_STATE_RUN 0 #define SQ_LOCAL_STATE_RUN 0
#define SQ_LOCAL_STATE_RET 1 #define SQ_LOCAL_STATE_RET 1
...@@ -78,4 +79,4 @@ ...@@ -78,4 +79,4 @@
#define PLAT_SQ_GPIO_BASE 0x51000000 #define PLAT_SQ_GPIO_BASE 0x51000000
#endif /* __PLATFORM_DEF_H__ */ #endif /* PLATFORM_DEF_H */
...@@ -4,8 +4,8 @@ ...@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __PLATFORM_DEF_H__ #ifndef PLATFORM_DEF_H
#define __PLATFORM_DEF_H__ #define PLATFORM_DEF_H
#include <common_def.h> #include <common_def.h>
#include <tbbr/tbbr_img_def.h> #include <tbbr/tbbr_img_def.h>
...@@ -23,10 +23,10 @@ ...@@ -23,10 +23,10 @@
#define PLATFORM_CORE_COUNT \ #define PLATFORM_CORE_COUNT \
((UNIPHIER_MAX_CPUS_PER_CLUSTER) * (UNIPHIER_CLUSTER_COUNT)) ((UNIPHIER_MAX_CPUS_PER_CLUSTER) * (UNIPHIER_CLUSTER_COUNT))
#define PLAT_MAX_PWR_LVL 1 #define PLAT_MAX_PWR_LVL U(1)
#define PLAT_MAX_OFF_STATE 2 #define PLAT_MAX_OFF_STATE U(2)
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE U(1)
#define BL2_BASE ULL(0x80000000) #define BL2_BASE ULL(0x80000000)
#define BL2_LIMIT ULL(0x80080000) #define BL2_LIMIT ULL(0x80080000)
...@@ -59,4 +59,4 @@ ...@@ -59,4 +59,4 @@
#define TSP_SEC_MEM_SIZE ((BL32_LIMIT) - (BL32_BASE)) #define TSP_SEC_MEM_SIZE ((BL32_LIMIT) - (BL32_BASE))
#define TSP_IRQ_SEC_PHY_TIMER 29 #define TSP_IRQ_SEC_PHY_TIMER 29
#endif /* __PLATFORM_DEF_H__ */ #endif /* PLATFORM_DEF_H */
...@@ -4,8 +4,10 @@ ...@@ -4,8 +4,10 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __BOARD_DEF_H__ #ifndef BOARD_DEF_H
#define __BOARD_DEF_H__ #define BOARD_DEF_H
#include <utils_def.h>
/* The ports must be in order and contiguous */ /* The ports must be in order and contiguous */
#define K3_CLUSTER0_CORE_COUNT 2 #define K3_CLUSTER0_CORE_COUNT 2
...@@ -27,7 +29,7 @@ ...@@ -27,7 +29,7 @@
#define SEC_SRAM_BASE 0x70000000 /* Base of MSMC SRAM */ #define SEC_SRAM_BASE 0x70000000 /* Base of MSMC SRAM */
#define SEC_SRAM_SIZE 0x00020000 /* 128k */ #define SEC_SRAM_SIZE 0x00020000 /* 128k */
#define PLAT_MAX_OFF_STATE 2 #define PLAT_MAX_OFF_STATE U(2)
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE U(1)
#endif /* __BOARD_DEF_H__ */ #endif /* BOARD_DEF_H */
/* /*
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
#ifndef __PLATFORM_DEF_H__ #ifndef PLATFORM_DEF_H
#define __PLATFORM_DEF_H__ #define PLATFORM_DEF_H
#include <arch.h> #include <arch.h>
#include <gic_common.h> #include <gic_common.h>
#include <interrupt_props.h> #include <interrupt_props.h>
#include <utils_def.h>
#include "../zynqmp_def.h" #include "../zynqmp_def.h"
/******************************************************************************* /*******************************************************************************
...@@ -21,9 +22,9 @@ ...@@ -21,9 +22,9 @@
#define PLATFORM_CORE_COUNT 4 #define PLATFORM_CORE_COUNT 4
#define PLAT_NUM_POWER_DOMAINS 5 #define PLAT_NUM_POWER_DOMAINS 5
#define PLAT_MAX_PWR_LVL 1 #define PLAT_MAX_PWR_LVL U(1)
#define PLAT_MAX_RET_STATE 1 #define PLAT_MAX_RET_STATE U(1)
#define PLAT_MAX_OFF_STATE 2 #define PLAT_MAX_OFF_STATE U(2)
/******************************************************************************* /*******************************************************************************
* BL31 specific defines. * BL31 specific defines.
...@@ -142,4 +143,4 @@ ...@@ -142,4 +143,4 @@
#define PLAT_ARM_G0_IRQ_PROPS(grp) #define PLAT_ARM_G0_IRQ_PROPS(grp)
#endif /* __PLATFORM_DEF_H__ */ #endif /* PLATFORM_DEF_H */
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