Commit 1593cae4 authored by Varun Wadekar's avatar Varun Wadekar
Browse files

denver: use plat_my_core_pos() to get core position



The current functions to disable and enable Dynamic Code Optimizer
(DCO) assume that all denver cores are in the same cluster. They
ignore AFF1 field of the mpidr_el1 register, which leads to
incorect logical core id calculation.

This patch calls the platform handler, plat_my_core_pos(), to get
the logical core id to disable/enable DCO for the core.

Original change by: Krishna Sitaraman <ksitaraman@nvidia.com>

Change-Id: I45fbd1f1eb032cc1db677a4fdecc554548b4a830
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
parent 1916092f
...@@ -156,11 +156,12 @@ endfunc denver_disable_ext_debug ...@@ -156,11 +156,12 @@ endfunc denver_disable_ext_debug
* ---------------------------------------------------- * ----------------------------------------------------
*/ */
func denver_enable_dco func denver_enable_dco
mrs x0, mpidr_el1 mov x3, x30
and x0, x0, #0xF bl plat_my_core_pos
mov x1, #1 mov x1, #1
lsl x1, x1, x0 lsl x1, x1, x0
msr s3_0_c15_c0_2, x1 msr s3_0_c15_c0_2, x1
mov x30, x3
ret ret
endfunc denver_enable_dco endfunc denver_enable_dco
...@@ -170,9 +171,10 @@ endfunc denver_enable_dco ...@@ -170,9 +171,10 @@ endfunc denver_enable_dco
*/ */
func denver_disable_dco func denver_disable_dco
mov x3, x30
/* turn off background work */ /* turn off background work */
mrs x0, mpidr_el1 bl plat_my_core_pos
and x0, x0, #0xF
mov x1, #1 mov x1, #1
lsl x1, x1, x0 lsl x1, x1, x0
lsl x2, x1, #16 lsl x2, x1, #16
...@@ -186,6 +188,7 @@ func denver_disable_dco ...@@ -186,6 +188,7 @@ func denver_disable_dco
and x2, x2, x1 and x2, x2, x1
cbnz x2, 1b cbnz x2, 1b
mov x30, x3
ret ret
endfunc denver_disable_dco endfunc denver_disable_dco
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment