diff --git a/docs/porting-guide.md b/docs/porting-guide.md
index 460dbccf913cca272c387cd665c64d6341b3592c..c9e4a5073290a3265ac6253cc7e345116209a164 100644
--- a/docs/porting-guide.md
+++ b/docs/porting-guide.md
@@ -446,8 +446,8 @@ This function executes with the MMU and data caches enabled. It is responsible
 for performing any remaining platform-specific setup that can occur after the
 MMU and data cache have been enabled.
 
-In the ARM FVP port, it zeros out the ZI section, enables the system level
-implementation of the generic timer counter and initializes the console.
+In the ARM FVP port, it zeros out the ZI section and enables the system level
+implementation of the generic timer counter.
 
 This function is also responsible for initializing the storage abstraction layer
 which is used to load further bootloader images.
diff --git a/plat/fvp/bl1_plat_setup.c b/plat/fvp/bl1_plat_setup.c
index 1cee705a58976977d0dcf60a2373628e5a1a7f22..d4fd81b2524c28a70e745ca7433e033297b9c09d 100644
--- a/plat/fvp/bl1_plat_setup.c
+++ b/plat/fvp/bl1_plat_setup.c
@@ -100,6 +100,9 @@ void bl1_early_platform_setup(void)
 
 	/* Initialize the platform config for future decision making */
 	platform_config_setup();
+
+	/* Initialize the console */
+	console_init(PL011_UART0_BASE);
 }
 
 /*******************************************************************************
@@ -114,11 +117,6 @@ void bl1_platform_setup(void)
 
 	/* Enable and initialize the System level generic timer */
 	mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_EN);
-
-	/* Initialize the console */
-	console_init(PL011_UART0_BASE);
-
-	return;
 }