Merge changes I4bd4612a,Id13a06d4,I0ea7f610,Ie6a7063b into integration

* changes:
  mediatek: mt8192: Add Vcore DVFS driver
  mediatek: mt8192: Add SPM suspend driver
  mediatek: mt8192: supports mcusys off when system suspend
  mediatek: mt8192: Add lpm driver

plat/mediatek/mt8192/include/platform_def.h

@@ -26,12 +26,16 @@
 #define MTK_MCDI_SRAM_BASE      0x11B000
 #define MTK_MCDI_SRAM_MAP_SIZE  0x1000
 
+#define TOPCKGEN_BASE    (IO_PHYS + 0x00000000)
 #define INFRACFG_AO_BASE (IO_PHYS + 0x00001000)
 #define GPIO_BASE        (IO_PHYS + 0x00005000)
 #define SPM_BASE         (IO_PHYS + 0x00006000)
+#define APMIXEDSYS       (IO_PHYS + 0x0000C000)
+#define DVFSRC_BASE      (IO_PHYS + 0x00012000)
 #define PMIC_WRAP_BASE   (IO_PHYS + 0x00026000)
 #define EMI_BASE         (IO_PHYS + 0x00219000)
 #define EMI_MPU_BASE     (IO_PHYS + 0x00226000)
+#define SSPM_MBOX_BASE   (IO_PHYS + 0x00480000)
 #define IOCFG_RM_BASE    (IO_PHYS + 0x01C20000)
 #define IOCFG_BM_BASE    (IO_PHYS + 0x01D10000)
 #define IOCFG_BL_BASE    (IO_PHYS + 0x01D30000)
@@ -41,6 +45,7 @@
 #define IOCFG_RT_BASE    (IO_PHYS + 0x01EA0000)
 #define IOCFG_LT_BASE    (IO_PHYS + 0x01F20000)
 #define IOCFG_TL_BASE    (IO_PHYS + 0x01F30000)
+#define MMSYS_BASE       (IO_PHYS + 0x04000000)
 /*******************************************************************************
  * UART related constants
  ******************************************************************************/

plat/mediatek/mt8192/plat_pm.c

@@ -87,11 +87,6 @@ static void plat_cpu_pwron_common(unsigned int cpu,
 
 	coordinate_cluster_pwron();
 
-	/* Enable the GIC CPU interface */
-	gicv3_rdistif_on(cpu);
-	gicv3_cpuif_enable(cpu);
-	mt_gic_rdistif_init();
-
 	/*
 	 * If mcusys does power down before then restore
 	 * all CPUs' GIC Redistributors
@@ -99,6 +94,9 @@ static void plat_cpu_pwron_common(unsigned int cpu,
 	if (IS_MCUSYS_OFF_STATE(state)) {
 		mt_gic_rdistif_restore_all();
 	} else {
+		gicv3_rdistif_on(cpu);
+		gicv3_cpuif_enable(cpu);
+		mt_gic_rdistif_init();
 		mt_gic_rdistif_restore();
 	}
 

plat/mediatek/mt8192/plat_sip_calls.c

@@ -6,6 +6,9 @@
 
 #include <common/debug.h>
 #include <common/runtime_svc.h>
+#include <mtk_sip_svc.h>
+#include <mt_spm_vcorefs.h>
+#include "plat_sip_calls.h"
 
 uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
 				u_register_t x1,
@@ -16,8 +19,14 @@ uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
 				void *handle,
 				u_register_t flags)
 {
+	uint64_t ret;
 
 	switch (smc_fid) {
+	case MTK_SIP_VCORE_CONTROL_ARCH32:
+	case MTK_SIP_VCORE_CONTROL_ARCH64:
+		ret = spm_vcorefs_args(x1, x2, x3, (uint64_t *)&x4);
+		SMC_RET2(handle, ret, x4);
+		break;
 	default:
 		ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
 		break;

plat/mediatek/mt8192/platform.mk

@@ -8,6 +8,7 @@ MTK_PLAT      := plat/mediatek
 MTK_PLAT_SOC  := ${MTK_PLAT}/${PLAT}
 
 PLAT_INCLUDES := -I${MTK_PLAT}/common/                            \
+                 -I${MTK_PLAT}/common/lpm/                        \
                  -I${MTK_PLAT_SOC}/include/                       \
                  -I${MTK_PLAT_SOC}/drivers/                       \
                  -I${MTK_PLAT_SOC}/drivers/dcm                    \
@@ -42,6 +43,7 @@ BL31_SOURCES    += common/desc_image_load.c                              \
                    ${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init_v2.c \
                    ${MTK_PLAT}/common/drivers/rtc/rtc_common.c           \
                    ${MTK_PLAT}/common/drivers/uart/uart.c                \
+                   ${MTK_PLAT}/common/lpm/mt_lp_rm.c                     \
                    ${MTK_PLAT}/common/mtk_plat_common.c                  \
                    ${MTK_PLAT}/common/mtk_sip_svc.c                      \
                    ${MTK_PLAT}/common/params_setup.c                     \
@@ -61,11 +63,15 @@ BL31_SOURCES    += common/desc_image_load.c                              \
                    ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c                 \
                    ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c              \
                    ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c          \
+                   ${MTK_PLAT_SOC}/drivers/mcdi/mt_lp_irqremain.c        \
                    ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c                \
                    ${MTK_PLAT_SOC}/drivers/ptp3/mtk_ptp3_main.c          \
                    ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c                 \
                    ${MTK_PLAT_SOC}/drivers/timer/mt_timer.c
 
+# Build SPM drivers
+include ${MTK_PLAT_SOC}/drivers/spm/build.mk
+
 # Configs for A76 and A55
 HW_ASSISTED_COHERENCY := 1
 USE_COHERENT_MEM := 0