diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h index ec7a277c9babbbc6375e6ed80c54a08cb6804df3..7a0645562aff5b9755fd603824b996943d5dc79e 100644 --- a/plat/nvidia/tegra/include/tegra_private.h +++ b/plat/nvidia/tegra/include/tegra_private.h @@ -10,7 +10,7 @@ #include <arch.h> #include <platform_def.h> #include <psci.h> -#include <xlat_tables.h> +#include <xlat_tables_v2.h> /******************************************************************************* * Tegra DRAM memory base address diff --git a/plat/nvidia/tegra/soc/t132/plat_setup.c b/plat/nvidia/tegra/soc/t132/plat_setup.c index 24199654a6a3ed3da8d3e6f83657c72b24db9b7a..4cbb3cc85324c50a27e3876bc5cfae8e95bcac72 100644 --- a/plat/nvidia/tegra/soc/t132/plat_setup.c +++ b/plat/nvidia/tegra/soc/t132/plat_setup.c @@ -8,7 +8,7 @@ #include <bl_common.h> #include <tegra_def.h> #include <tegra_private.h> -#include <xlat_tables.h> +#include <xlat_tables_v2.h> /******************************************************************************* * The Tegra power domain tree has a single system level power domain i.e. a diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c index ba2457903f998d9e5a3f537708f39f3d7d5188fa..fad6a59e2709d0796592615bbc5eb8c8c058902f 100644 --- a/plat/nvidia/tegra/soc/t186/plat_setup.c +++ b/plat/nvidia/tegra/soc/t186/plat_setup.c @@ -20,7 +20,7 @@ #include <tegra_def.h> #include <tegra_platform.h> #include <tegra_private.h> -#include <xlat_tables.h> +#include <xlat_tables_v2.h> DEFINE_RENAME_SYSREG_RW_FUNCS(l2ctlr_el1, CORTEX_A57_L2CTLR_EL1) extern uint64_t tegra_enable_l2_ecc_parity_prot; diff --git a/plat/nvidia/tegra/soc/t210/plat_setup.c b/plat/nvidia/tegra/soc/t210/plat_setup.c index b058bed4654bea852b4dcf7b28559dab1c842feb..c3fc7b4a580825824268e848cd9e0d2688e93fd7 100644 --- a/plat/nvidia/tegra/soc/t210/plat_setup.c +++ b/plat/nvidia/tegra/soc/t210/plat_setup.c @@ -9,7 +9,7 @@ #include <console.h> #include <tegra_def.h> #include <tegra_private.h> -#include <xlat_tables.h> +#include <xlat_tables_v2.h> /******************************************************************************* * The Tegra power domain tree has a single system level power domain i.e. a