Commit 295538bc authored by Sandrine Bailleux's avatar Sandrine Bailleux Committed by Dan Handley
Browse files

AArch64: Remove EL-agnostic TLB helper functions

Also, don't invalidate the TLBs in disable_mmu() function, it's better
to do it in enable_mmu() function just before actually enabling the
MMU.

Change-Id: Ib32d6660019b0b2c17254156aad4be67ab4970e1
parent 3738274d
...@@ -48,8 +48,6 @@ ...@@ -48,8 +48,6 @@
/******************************************************************************* /*******************************************************************************
* TLB maintenance accessor prototypes * TLB maintenance accessor prototypes
******************************************************************************/ ******************************************************************************/
extern void tlbiall(void);
extern void tlbiallis(void);
extern void tlbialle1(void); extern void tlbialle1(void);
extern void tlbialle1is(void); extern void tlbialle1is(void);
extern void tlbialle2(void); extern void tlbialle2(void);
......
...@@ -30,8 +30,6 @@ ...@@ -30,8 +30,6 @@
#include <arch_helpers.h> #include <arch_helpers.h>
.globl tlbiall
.globl tlbiallis
.globl tlbialle1 .globl tlbialle1
.globl tlbialle1is .globl tlbialle1is
.globl tlbialle2 .globl tlbialle2
...@@ -43,26 +41,6 @@ ...@@ -43,26 +41,6 @@
.section .text, "ax" .section .text, "ax"
tlbiall:; .type tlbiall, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq tlbialle1
cmp x0, #(MODE_EL2 << MODE_EL_SHIFT)
b.eq tlbialle2
cmp x0, #(MODE_EL3 << MODE_EL_SHIFT)
b.eq tlbialle3
tlbiallis:; .type tlbiallis, %function
mrs x0, CurrentEl
cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
b.eq tlbialle1is
cmp x0, #(MODE_EL2 << MODE_EL_SHIFT)
b.eq tlbialle2is
cmp x0, #(MODE_EL3 << MODE_EL_SHIFT)
b.eq tlbialle3is
tlbialle1:; .type tlbialle1, %function tlbialle1:; .type tlbialle1, %function
tlbi alle1 tlbi alle1
dsb sy dsb sy
......
...@@ -461,7 +461,7 @@ void enable_mmu() ...@@ -461,7 +461,7 @@ void enable_mmu()
TCR_RGN_INNER_WBA | TCR_T0SZ_4GB; TCR_RGN_INNER_WBA | TCR_T0SZ_4GB;
if (GET_EL(current_el) == MODE_EL3) { if (GET_EL(current_el) == MODE_EL3) {
tcr |= TCR_EL3_RES1; tcr |= TCR_EL3_RES1;
/* Invalidate all TLBs */ /* Invalidate EL3 TLBs */
tlbialle3(); tlbialle3();
} else { } else {
/* Invalidate EL1 TLBs */ /* Invalidate EL1 TLBs */
...@@ -491,9 +491,6 @@ void disable_mmu(void) ...@@ -491,9 +491,6 @@ void disable_mmu(void)
write_ttbr0(0); write_ttbr0(0);
write_sctlr(0); write_sctlr(0);
/* Invalidate TLBs of the CurrentEL */
tlbiall();
/* Flush the caches */ /* Flush the caches */
dcsw_op_all(DCCISW); dcsw_op_all(DCCISW);
......
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