Commit 2d1d2f05 authored by Marcin Wojtas's avatar Marcin Wojtas
Browse files

marvell: drivers: mochi: specify stream ID for SD/MMC



This patch enables the stream ID for the SD/MMC
controllers via dedicated unit register. Thanks to this
change it is possible to configure properly the
IOMMU in OS and use the SD/MMC interface in a guest
Virtual Machine.

Change-Id: I99cbd2c9882eb558ba01405d3d8a3e969f06e082
Signed-off-by: default avatarMarcin Wojtas <mw@semihalf.com>
Signed-off-by: default avatarTomasz Nowicki <tn@semihalf.com>
parent c9bb9c0e
/* /*
* Copyright (C) 2018 Marvell International Ltd. * Copyright (C) 2018-2020 Marvell International Ltd.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
* https://spdx.org/licenses * https://spdx.org/licenses
...@@ -130,6 +130,7 @@ enum axi_attr { ...@@ -130,6 +130,7 @@ enum axi_attr {
#define USB3H_1_STREAM_ID_REG (RFU_STREAM_ID_BASE + 0x10) #define USB3H_1_STREAM_ID_REG (RFU_STREAM_ID_BASE + 0x10)
#define SATA_0_STREAM_ID_REG (RFU_STREAM_ID_BASE + 0x14) #define SATA_0_STREAM_ID_REG (RFU_STREAM_ID_BASE + 0x14)
#define SATA_1_STREAM_ID_REG (RFU_STREAM_ID_BASE + 0x18) #define SATA_1_STREAM_ID_REG (RFU_STREAM_ID_BASE + 0x18)
#define SDIO_0_STREAM_ID_REG (RFU_STREAM_ID_BASE + 0x28)
#define CP_DMA_0_STREAM_ID_REG (0x6B0010) #define CP_DMA_0_STREAM_ID_REG (0x6B0010)
#define CP_DMA_1_STREAM_ID_REG (0x6D0010) #define CP_DMA_1_STREAM_ID_REG (0x6D0010)
...@@ -144,6 +145,7 @@ uintptr_t stream_id_reg[] = { ...@@ -144,6 +145,7 @@ uintptr_t stream_id_reg[] = {
CP_DMA_1_STREAM_ID_REG, CP_DMA_1_STREAM_ID_REG,
SATA_0_STREAM_ID_REG, SATA_0_STREAM_ID_REG,
SATA_1_STREAM_ID_REG, SATA_1_STREAM_ID_REG,
SDIO_0_STREAM_ID_REG,
0 0
}; };
......
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