RAS: MISRA fixes

These changes address most of the required MISRA rules. In the process,
some from generic code is also fixed.

No functional changes.

Change-Id: I76cacf6e1d73b09510561b5090c2bb66d81bec88
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

include/lib/extensions/ras.h

@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __RAS_COMMON__
-#define __RAS_COMMON__
+#ifndef RAS_COMMON
+#define RAS_COMMON
 
-#define ERR_HANDLER_VERSION	1
+#define ERR_HANDLER_VERSION	1U
 
 /* Error record access mechanism */
 #define ERR_ACCESS_SYSREG	0
@@ -20,18 +20,18 @@
  * are declared. Only then would ARRAY_SIZE() yield a meaningful value.
  */
 #define REGISTER_ERR_RECORD_INFO(_records) \
-	const struct err_record_mapping err_record_mapping = { \
-		.err_records = _records, \
+	const struct err_record_mapping err_record_mappings = { \
+		.err_records = (_records), \
 		.num_err_records = ARRAY_SIZE(_records), \
 	}
 
 /* Error record info iterator */
 #define for_each_err_record_info(_i, _info) \
-	for (_i = 0, _info = err_record_mapping.err_records; \
-		_i < err_record_mapping.num_err_records; \
-		_i++, _info++)
+	for ((_i) = 0, (_info) = err_record_mappings.err_records; \
+		(_i) < err_record_mappings.num_err_records; \
+		(_i)++, (_info)++)
 
-#define _ERR_RECORD_COMMON(_probe, _handler, _aux) \
+#define ERR_RECORD_COMMON_(_probe, _handler, _aux) \
 	.probe = _probe, \
 	.handler = _handler, \
 	.aux_data = _aux,
@@ -42,7 +42,7 @@
 		.sysreg.idx_start = _idx_start, \
 		.sysreg.num_idx = _num_idx, \
 		.access = ERR_ACCESS_SYSREG, \
-		_ERR_RECORD_COMMON(_probe, _handler, _aux) \
+		ERR_RECORD_COMMON_(_probe, _handler, _aux) \
 	}
 
 #define ERR_RECORD_MEMMAP_V1(_base_addr, _size_num_k, _probe, _handler, _aux) \
@@ -51,7 +51,7 @@
 		.memmap.base_addr = _base_addr, \
 		.memmap.size_num_k = _size_num_k, \
 		.access = ERR_ACCESS_MEMMAP, \
-		_ERR_RECORD_COMMON(_probe, _handler, _aux) \
+		ERR_RECORD_COMMON_(_probe, _handler, _aux) \
 	}
 
 /*
@@ -63,8 +63,8 @@
  * array is expected to be sorted in the increasing order of interrupt number.
  */
 #define REGISTER_RAS_INTERRUPTS(_array) \
-	const struct ras_interrupt_mapping ras_interrupt_mapping = { \
-		.intrs = _array, \
+	const struct ras_interrupt_mapping ras_interrupt_mappings = { \
+		.intrs = (_array), \
 		.num_intrs = ARRAY_SIZE(_array), \
 	}
 
@@ -165,8 +165,8 @@ struct ras_interrupt_mapping {
 	size_t num_intrs;
 };
 
-extern const struct err_record_mapping err_record_mapping;
-extern const struct ras_interrupt_mapping ras_interrupt_mapping;
+extern const struct err_record_mapping err_record_mappings;
+extern const struct ras_interrupt_mapping ras_interrupt_mappings;
 
 
 /*
@@ -196,4 +196,4 @@ int ras_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
 void ras_init(void);
 
 #endif /* __ASSEMBLY__ */
-#endif /* __RAS_COMMON__ */
+#endif /* RAS_COMMON */

include/lib/extensions/ras_arch.h

@@ -11,28 +11,28 @@
  * Size of nodes implementing Standard Error Records - currently only 4k is
  * supported.
  */
-#define STD_ERR_NODE_SIZE_NUM_K		4
+#define STD_ERR_NODE_SIZE_NUM_K		4U
 
 /*
  * Individual register offsets within an error record in Standard Error Record
  * format when error records are accessed through memory-mapped registers.
  */
-#define ERR_FR(n)	(0x0 + (64 * (n)))
-#define ERR_CTLR(n)	(0x8 + (64 * (n)))
-#define ERR_STATUS(n)	(0x10 + (64 * (n)))
-#define ERR_ADDR(n)	(0x18 + (64 * (n)))
-#define ERR_MISC0(n)	(0x20 + (64 * (n)))
-#define ERR_MISC1(n)	(0x28 + (64 * (n)))
+#define ERR_FR(n)	(0x0ULL + (64ULL * (n)))
+#define ERR_CTLR(n)	(0x8ULL + (64ULL * (n)))
+#define ERR_STATUS(n)	(0x10ULL + (64ULL * (n)))
+#define ERR_ADDR(n)	(0x18ULL + (64ULL * (n)))
+#define ERR_MISC0(n)	(0x20ULL + (64ULL * (n)))
+#define ERR_MISC1(n)	(0x28ULL + (64ULL * (n)))
 
 /* Group Status Register (ERR_STATUS) offset */
 #define ERR_GSR(base, size_num_k, n) \
-	((base) + (0x380 * (size_num_k)) + (8 * (n)))
+	((base) + (0x380ULL * (size_num_k)) + (8ULL * (n)))
 
 /* Management register offsets */
 #define ERR_DEVID(base, size_num_k) \
-	((base) + ((0x400 * (size_num_k)) - 0x100) + 0xc8)
+	((base) + ((0x400ULL * (size_num_k)) - 0x100ULL) + 0xc8ULL)
 
-#define ERR_DEVID_MASK	0xffff
+#define ERR_DEVID_MASK	0xffffUL
 
 /* Standard Error Record status register fields */
 #define ERR_STATUS_AV_SHIFT	31
@@ -244,7 +244,8 @@ static inline uint64_t ser_get_misc1(uintptr_t base, unsigned int idx)
  */
 static inline void ser_sys_select_record(unsigned int idx)
 {
-	unsigned int max_idx __unused = read_erridr_el1() & ERRIDR_MASK;
+	unsigned int max_idx __unused =
+		(unsigned int) read_erridr_el1() & ERRIDR_MASK;
 
 	assert(idx < max_idx);
 

lib/extensions/ras/ras_common.c

@@ -11,6 +11,7 @@
 #include <platform.h>
 #include <ras.h>
 #include <ras_arch.h>
+#include <stdbool.h>
 
 #ifndef PLAT_RAS_PRI
 # error Platform must define RAS priority value
@@ -20,15 +21,15 @@
 int ras_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
 		void *handle, uint64_t flags)
 {
-	unsigned int i, n_handled = 0, ret;
-	int probe_data;
+	unsigned int i, n_handled = 0;
+	int probe_data, ret;
 	struct err_record_info *info;
 
 	const struct err_handler_data err_data = {
 		.version = ERR_HANDLER_VERSION,
 		.ea_reason = ea_reason,
 		.interrupt = 0,
-		.syndrome = syndrome,
+		.syndrome = (uint32_t) syndrome,
 		.flags = flags,
 		.cookie = cookie,
 		.handle = handle
@@ -39,7 +40,7 @@ int ras_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
 		assert(info->handler != NULL);
 
 		/* Continue probing until the record group signals no error */
-		while (1) {
+		while (true) {
 			if (info->probe(info, &probe_data) == 0)
 				break;
 
@@ -52,20 +53,20 @@ int ras_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
 		}
 	}
 
-	return (n_handled != 0);
+	return (n_handled != 0U) ? 1 : 0;
 }
 
 #if ENABLE_ASSERTIONS
 static void assert_interrupts_sorted(void)
 {
 	unsigned int i, last;
-	struct ras_interrupt *start = ras_interrupt_mapping.intrs;
+	struct ras_interrupt *start = ras_interrupt_mappings.intrs;
 
-	if (ras_interrupt_mapping.num_intrs == 0)
+	if (ras_interrupt_mappings.num_intrs == 0UL)
 		return;
 
 	last = start[0].intr_number;
-	for (i = 1; i < ras_interrupt_mapping.num_intrs; i++) {
+	for (i = 1; i < ras_interrupt_mappings.num_intrs; i++) {
 		assert(start[i].intr_number > last);
 		last = start[i].intr_number;
 	}
@@ -79,7 +80,7 @@ static void assert_interrupts_sorted(void)
 static int ras_interrupt_handler(uint32_t intr_raw, uint32_t flags,
 		void *handle, void *cookie)
 {
-	struct ras_interrupt *ras_inrs = ras_interrupt_mapping.intrs;
+	struct ras_interrupt *ras_inrs = ras_interrupt_mappings.intrs;
 	struct ras_interrupt *selected = NULL;
 	int start, end, mid, probe_data, ret __unused;
 
@@ -91,10 +92,10 @@ static int ras_interrupt_handler(uint32_t intr_raw, uint32_t flags,
 		.handle = handle
 	};
 
-	assert(ras_interrupt_mapping.num_intrs > 0);
+	assert(ras_interrupt_mappings.num_intrs > 0UL);
 
 	start = 0;
-	end = ras_interrupt_mapping.num_intrs;
+	end = (int) ras_interrupt_mappings.num_intrs;
 	while (start <= end) {
 		mid = ((end + start) / 2);
 		if (intr_raw == ras_inrs[mid].intr_number) {
@@ -114,14 +115,14 @@ static int ras_interrupt_handler(uint32_t intr_raw, uint32_t flags,
 		panic();
 	}
 
-	if (selected->err_record->probe) {
+	if (selected->err_record->probe != NULL) {
 		ret = selected->err_record->probe(selected->err_record, &probe_data);
 		assert(ret != 0);
 	}
 
 	/* Call error handler for the record group */
 	assert(selected->err_record->handler != NULL);
-	selected->err_record->handler(selected->err_record, probe_data,
+	(void) selected->err_record->handler(selected->err_record, probe_data,
 			&err_data);
 
 	return 0;

lib/extensions/ras/std_err_record.c

@@ -13,28 +13,29 @@
  */
 int ser_probe_memmap(uintptr_t base, unsigned int size_num_k, int *probe_data)
 {
-	int num_records, num_group_regs, i;
+	unsigned int num_records, num_group_regs, i;
 	uint64_t gsr;
 
-	assert(base != 0);
+	assert(base != 0UL);
 
 	/* Only 4K supported for now */
 	assert(size_num_k == STD_ERR_NODE_SIZE_NUM_K);
 
-	num_records = (mmio_read_32(ERR_DEVID(base, size_num_k)) & ERR_DEVID_MASK);
+	num_records = (unsigned int)
+		(mmio_read_32(ERR_DEVID(base, size_num_k)) & ERR_DEVID_MASK);
 
 	/* A group register shows error status for 2^6 error records */
-	num_group_regs = (num_records >> 6) + 1;
+	num_group_regs = (num_records >> 6U) + 1U;
 
 	/* Iterate through group registers to find a record in error */
 	for (i = 0; i < num_group_regs; i++) {
 		gsr = mmio_read_64(ERR_GSR(base, size_num_k, i));
-		if (gsr == 0)
+		if (gsr == 0ULL)
 			continue;
 
 		/* Return the index of the record in error */
 		if (probe_data != NULL)
-			*probe_data = ((i << 6) + __builtin_ctz(gsr));
+			*probe_data = (((int) (i << 6U)) + __builtin_ctzll(gsr));
 
 		return 1;
 	}
@@ -49,13 +50,14 @@ int ser_probe_memmap(uintptr_t base, unsigned int size_num_k, int *probe_data)
  */
 int ser_probe_sysreg(unsigned int idx_start, unsigned int num_idx, int *probe_data)
 {
-	int i;
+	unsigned int i;
 	uint64_t status;
-	unsigned int max_idx __unused = read_erridr_el1() & ERRIDR_MASK;
+	unsigned int max_idx __unused =
+		((unsigned int) read_erridr_el1()) & ERRIDR_MASK;
 
 	assert(idx_start < max_idx);
-	assert(check_u32_overflow(idx_start, num_idx) == 0);
-	assert((idx_start + num_idx - 1) < max_idx);
+	assert(check_u32_overflow(idx_start, num_idx));
+	assert((idx_start + num_idx - 1U) < max_idx);
 
 	for (i = 0; i < num_idx; i++) {
 		/* Select the error record */
@@ -65,9 +67,9 @@ int ser_probe_sysreg(unsigned int idx_start, unsigned int num_idx, int *probe_da
 		status = read_erxstatus_el1();
 
 		/* Check for valid field in status */
-		if (ERR_STATUS_GET_FIELD(status, V)) {
+		if (ERR_STATUS_GET_FIELD(status, V) != 0U) {
 			if (probe_data != NULL)
-				*probe_data = i;
+				*probe_data = (int) i;
 			return 1;
 		}
 	}