Makefile: don't use $(CC) before value is explicit set
Unless specified in the environment, $(CC) expands to some generic host C compiler like cc or c99. We set our own value for $(CC), but only few lines later. Move the first use of the $(CC) variable behind the definition to correct this. Change-Id: I45344e063d21ddfe22b7ad77954e85c1c46087bd Fixes: 1684b873 ("Use clang assembler when clang compiler is used") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Please register or sign in to comment