Workaround for Neoverse N1 erratum 1257314

Neoverse N1 erratum 1257314 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR3_EL1 system register, which prevents parallel
execution of divide and square root instructions.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html



Change-Id: I54f0f40ff9043efee40d51e796b92ed85b394cbb
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

docs/design/cpu-specific-build-macros.rst

@@ -243,6 +243,9 @@ For Neoverse N1, the following errata build flags are defined :
 -  ``ERRATA_N1_1220197``: This applies errata 1220197 workaround to Neoverse-N1
    CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
 
+-  ``ERRATA_N1_1257314``: This applies errata 1257314 workaround to Neoverse-N1
+   CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
+
 -  ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1
    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
 

include/lib/cpus/aarch64/neoverse_n1.h

@@ -48,6 +48,9 @@
 #define NEOVERSE_N1_CPUACTLR2_EL1_BIT_16	(ULL(1) << 16)
 #define NEOVERSE_N1_CPUACTLR2_EL1_BIT_59	(ULL(1) << 59)
 
+#define NEOVERSE_N1_CPUACTLR3_EL1	S3_0_C15_C1_2
+
+#define NEOVERSE_N1_CPUACTLR3_EL1_BIT_10	(ULL(1) << 10)
 
 /* Instruction patching registers */
 #define CPUPSELR_EL3	S3_6_C15_C8_0

lib/cpus/aarch64/neoverse_n1.S

@@ -211,6 +211,33 @@ func check_errata_1220197
 	b	cpu_rev_var_ls
 endfunc check_errata_1220197
 
+/* --------------------------------------------------
+ * Errata Workaround for Neoverse N1 Errata #1257314
+ * This applies to revision <=r3p0 of Neoverse N1.
+ * Inputs:
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0-x17
+ * --------------------------------------------------
+ */
+func errata_n1_1257314_wa
+	/* Compare x0 against revision r3p0 */
+	mov	x17, x30
+	bl	check_errata_1257314
+	cbz	x0, 1f
+	mrs	x1, NEOVERSE_N1_CPUACTLR3_EL1
+	orr	x1, x1, NEOVERSE_N1_CPUACTLR3_EL1_BIT_10
+	msr	NEOVERSE_N1_CPUACTLR3_EL1, x1
+	isb
+1:
+	ret	x17
+endfunc errata_n1_1257314_wa
+
+func check_errata_1257314
+	/* Applies to <=r3p0 */
+	mov	x1, #0x30
+	b	cpu_rev_var_ls
+endfunc check_errata_1257314
+
 /* --------------------------------------------------
  * Errata Workaround for Neoverse N1 Erratum 1315703.
  * This applies to revision <= r3p0 of Neoverse N1.
@@ -284,6 +311,11 @@ func neoverse_n1_reset_func
 	bl	errata_n1_1220197_wa
 #endif
 
+#if ERRATA_N1_1257314
+	mov	x0, x18
+	bl	errata_n1_1257314_wa
+#endif
+
 #if ERRATA_N1_1315703
 	mov	x0, x18
 	bl	errata_n1_1315703_wa
@@ -351,6 +383,7 @@ func neoverse_n1_errata_report
 	report_errata ERRATA_N1_1165347, neoverse_n1, 1165347
 	report_errata ERRATA_N1_1207823, neoverse_n1, 1207823
 	report_errata ERRATA_N1_1220197, neoverse_n1, 1220197
+	report_errata ERRATA_N1_1257314, neoverse_n1, 1257314
 	report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
 	report_errata ERRATA_DSU_936184, neoverse_n1, dsu_936184
 

lib/cpus/cpu-ops.mk

@@ -258,6 +258,10 @@ ERRATA_N1_1207823	?=0
 # only to revision <= r2p0 of the Neoverse N1 cpu.
 ERRATA_N1_1220197	?=0
 
+# Flag to apply erratum 1257314 workaround during reset. This erratum applies
+# only to revision <= r3p0 of the Neoverse N1 cpu.
+ERRATA_N1_1257314	?=0
+
 # Flag to apply erratum 1315703 workaround during reset. This erratum applies
 # to revisions before r3p1 of the Neoverse N1 cpu.
 ERRATA_N1_1315703	?=1
@@ -471,6 +475,10 @@ $(eval $(call add_define,ERRATA_N1_1207823))
 $(eval $(call assert_boolean,ERRATA_N1_1220197))
 $(eval $(call add_define,ERRATA_N1_1220197))
 
+# Process ERRATA_N1_1257314 flag
+$(eval $(call assert_boolean,ERRATA_N1_1257314))
+$(eval $(call add_define,ERRATA_N1_1257314))
+
 # Process ERRATA_N1_1315703 flag
 $(eval $(call assert_boolean,ERRATA_N1_1315703))
 $(eval $(call add_define,ERRATA_N1_1315703))