Skip to content

GitLab

Commit 3705cd47 authored by davidcunado-arm's avatar davidcunado-arm Committed by GitHub
Browse files

Merge pull request #966 from davidcunado-arm/dc/build_with_gcc6.2 

Resolve build errors flagged by GCC 6.2
parents 3465ab60 568ac1f7
Show whitespace changes
Inline Side-by-side
plat/mediatek/mt6795/include/mcucfg.h
View file @ 3705cd47
/* /*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -104,12 +104,10 @@ struct mt6795_mcucfg_regs { ...@@ -104,12 +104,10 @@ struct mt6795_mcucfg_regs {
static struct mt6795_mcucfg_regs *const mt6795_mcucfg = (void *)MCUCFG_BASE; static struct mt6795_mcucfg_regs *const mt6795_mcucfg = (void *)MCUCFG_BASE;
/* cpu boot mode */ /* cpu boot mode */
enum { #define MP0_CPUCFG_64BIT_SHIFT 12
MP0_CPUCFG_64BIT_SHIFT = 12, #define MP1_CPUCFG_64BIT_SHIFT 28
MP1_CPUCFG_64BIT_SHIFT = 28, #define MP0_CPUCFG_64BIT (U(0xf) << MP0_CPUCFG_64BIT_SHIFT)
MP0_CPUCFG_64BIT = 0xf << MP0_CPUCFG_64BIT_SHIFT, #define MP1_CPUCFG_64BIT (U(0xf) << MP1_CPUCFG_64BIT_SHIFT)
MP1_CPUCFG_64BIT = 0xf << MP1_CPUCFG_64BIT_SHIFT
};
/* scu related */ /* scu related */
enum { enum {
......
plat/mediatek/mt8173/include/mcucfg.h
View file @ 3705cd47
/* /*
* Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -103,12 +103,10 @@ struct mt8173_mcucfg_regs { ...@@ -103,12 +103,10 @@ struct mt8173_mcucfg_regs {
static struct mt8173_mcucfg_regs *const mt8173_mcucfg = (void *)MCUCFG_BASE; static struct mt8173_mcucfg_regs *const mt8173_mcucfg = (void *)MCUCFG_BASE;
/* cpu boot mode */ /* cpu boot mode */
enum { #define MP0_CPUCFG_64BIT_SHIFT 12
MP0_CPUCFG_64BIT_SHIFT = 12, #define MP1_CPUCFG_64BIT_SHIFT 28
MP1_CPUCFG_64BIT_SHIFT = 28, #define MP0_CPUCFG_64BIT (U(0xf) << MP0_CPUCFG_64BIT_SHIFT)
MP0_CPUCFG_64BIT = 0xf << MP0_CPUCFG_64BIT_SHIFT, #define MP1_CPUCFG_64BIT (U(0xf) << MP1_CPUCFG_64BIT_SHIFT)
MP1_CPUCFG_64BIT = 0xf << MP1_CPUCFG_64BIT_SHIFT
};
/* scu related */ /* scu related */
enum { enum {
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment