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Commit 39c92b62 authored by Paul Beesley's avatar Paul Beesley Committed by TrustedFirmware Code Review
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Merge changes from topic "av/console-port" into integration 

* changes:
  qemu: use new console interface in aarch32
  warp7: remove old console from makefile
  Remove MULTI_CONSOLE_API flag and references to it
  Console: removed legacy console API
parents e54b4dd9 e6ffc254
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plat/common/aarch32/plat_sp_min_common.c
View file @ 39c92b62
......@@ -21,9 +21,5 @@ void sp_min_plat_runtime_setup(void)
* Finish the use of console driver in SP_MIN so that any runtime logs
* from SP_MIN will be suppressed.
*/
#if MULTI_CONSOLE_API
console_switch_state(CONSOLE_FLAG_RUNTIME);
#else
console_uninit();
#endif
}
plat/common/aarch64/crash_console_helpers.S
View file @ 39c92b62
......@@ -16,10 +16,6 @@
.globl plat_crash_console_putc
.globl plat_crash_console_flush
#if !MULTI_CONSOLE_API
#error "This crash console implementation only works with the MULTI_CONSOLE_API!"
#endif
/*
* Spinlock to syncronize access to crash_console_triggered. We cannot
* acquire spinlocks when the cache is disabled, so in some cases (like
......
plat/common/aarch64/plat_common.c
View file @ 39c92b62
......@@ -30,11 +30,7 @@
void bl31_plat_runtime_setup(void)
{
#if MULTI_CONSOLE_API
console_switch_state(CONSOLE_FLAG_RUNTIME);
#else
console_uninit();
#endif
}
/*
......
plat/hisilicon/hikey/platform.mk
View file @ 39c92b62
......@@ -20,7 +20,6 @@ endif
CONSOLE_BASE := PL011_UART3_BASE
CRASH_CONSOLE_BASE := PL011_UART3_BASE
MULTI_CONSOLE_API := 1
PLAT_PARTITION_MAX_ENTRIES := 12
PLAT_PL061_MAX_GPIOS := 160
COLD_BOOT_SINGLE_CPU := 1
......
plat/hisilicon/hikey960/platform.mk
View file @ 39c92b62
......@@ -17,7 +17,6 @@ else
$(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value")
endif
MULTI_CONSOLE_API := 1
CRASH_CONSOLE_BASE := PL011_UART6_BASE
COLD_BOOT_SINGLE_CPU := 1
PLAT_PL061_MAX_GPIOS := 176
......
plat/hisilicon/poplar/platform.mk
View file @ 39c92b62
......@@ -46,7 +46,6 @@ ERRATA_A53_855873 := 1
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
ENABLE_SVE_FOR_NS := 0
MULTI_CONSOLE_API := 1
WORKAROUND_CVE_2017_5715 := 0
PLAT_PL061_MAX_GPIOS := 104
......
plat/imx/imx7/warp7/platform.mk
View file @ 39c92b62
#
# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
......@@ -31,7 +31,6 @@ PLAT_INCLUDES := -Idrivers/imx/uart \
include lib/xlat_tables_v2/xlat_tables.mk
BL2_SOURCES += common/desc_image_load.c \
drivers/console/aarch32/console.S \
drivers/delay_timer/delay_timer.c \
drivers/mmc/mmc.c \
drivers/io/io_block.c \
......@@ -119,9 +118,6 @@ SEPARATE_CODE_AND_RODATA := 1
# Use Coherent memory
USE_COHERENT_MEM := 1
# Use multi console API
MULTI_CONSOLE_API := 1
# PLAT_WARP7_UART
PLAT_WARP7_UART :=1
$(eval $(call add_define,PLAT_WARP7_UART))
......
plat/imx/imx8m/imx8mm/platform.mk
View file @ 39c92b62
......@@ -39,7 +39,6 @@ BL31_SOURCES += plat/imx/common/imx8_helpers.S \
USE_COHERENT_MEM := 1
RESET_TO_BL31 := 1
A53_DISABLE_NON_TEMPORAL_HINT := 0
MULTI_CONSOLE_API := 1
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
......
plat/imx/imx8m/imx8mq/platform.mk
View file @ 39c92b62
......@@ -39,7 +39,6 @@ BL31_SOURCES += plat/imx/common/imx8_helpers.S \
USE_COHERENT_MEM := 1
RESET_TO_BL31 := 1
A53_DISABLE_NON_TEMPORAL_HINT := 0
MULTI_CONSOLE_API := 1
ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1
......
plat/imx/imx8qm/platform.mk
View file @ 39c92b62
......@@ -36,7 +36,6 @@ include plat/imx/common/sci/sci_api.mk
USE_COHERENT_MEM := 1
RESET_TO_BL31 := 1
A53_DISABLE_NON_TEMPORAL_HINT := 0
MULTI_CONSOLE_API := 1
ERRATA_A72_859971 := 1
ERRATA_A53_835769 := 1
......
plat/imx/imx8qx/platform.mk
View file @ 39c92b62
......@@ -33,4 +33,3 @@ include plat/imx/common/sci/sci_api.mk
USE_COHERENT_MEM := 1
RESET_TO_BL31 := 1
MULTI_CONSOLE_API := 1
plat/intel/soc/stratix10/platform.mk
View file @ 39c92b62
......@@ -68,5 +68,4 @@ BL31_SOURCES += drivers/arm/cci/cci.c \
PROGRAMMABLE_RESET_ADDRESS := 0
BL2_AT_EL3 := 1
MULTI_CONSOLE_API := 1
USE_COHERENT_MEM := 1
plat/layerscape/board/ls1043/platform.mk
View file @ 39c92b62
......@@ -56,9 +56,6 @@ BL31_SOURCES += plat/layerscape/board/ls1043/ls1043_bl31_setup.c \
${LS1043_INTERCONNECT_SOURCES} \
${LS1043_SECURITY_SOURCES}
# Disable the PSCI platform compatibility layer
MULTI_CONSOLE_API := 1
# Enable workarounds for selected Cortex-A53 erratas.
ERRATA_A53_855873 := 1
......
plat/layerscape/common/aarch64/ls_console.S
View file @ 39c92b62
......@@ -78,7 +78,6 @@ init_fail:
ret
endfunc console_ls_16550_core_init
#if MULTI_CONSOLE_API
.globl console_ls_16550_register
/* -----------------------------------------------
......@@ -111,16 +110,6 @@ func console_ls_16550_register
register_fail:
ret x7
endfunc console_ls_16550_register
#else
.globl console_core_init
.globl console_core_putc
.globl console_core_getc
.globl console_core_flush
.equ console_core_init,console_ls_16550_core_init
.equ console_core_putc,console_ls_16550_core_putc
.equ console_core_getc,console_ls_16550_core_getc
.equ console_core_flush,console_ls_16550_core_flush
#endif
/* --------------------------------------------------------
* int console_ls_16550_core_putc(int c, uintptr_t base_addr)
......
plat/layerscape/common/aarch64/ls_helpers.S
View file @ 39c92b62
......@@ -49,7 +49,6 @@ endfunc plat_ls_calc_core_pos
* ---------------------------------------------
*/
#if MULTI_CONSOLE_API
/* -----------------------------------------------------
* int plat_crash_console_init(void)
* Use normal console by default. Switch it to crash
......@@ -101,45 +100,6 @@ func plat_crash_console_flush
b console_flush
endfunc plat_crash_console_flush
#else /* MULTI_CONSOLE_API */
/* -----------------------------------------------------
* In the old API these are all no-op stubs that need to
* be overridden by the platform to be useful.
* -----------------------------------------------------
*/
func plat_crash_console_init
mov_imm x0, PLAT_LS1043_UART_BASE
mov_imm x1, PLAT_LS1043_UART_CLOCK
mov_imm x2, PLAT_LS1043_UART_BAUDRATE
b console_core_init
endfunc plat_crash_console_init
/* ---------------------------------------------
* int plat_crash_console_putc(int c)
* Function to print a character on the crash
* console without a C Runtime.
* Clobber list : x1, x2
* ---------------------------------------------
*/
func plat_crash_console_putc
mov_imm x1, PLAT_LS1043_UART_BASE
b console_core_putc
endfunc plat_crash_console_putc
/* ---------------------------------------------
* int plat_crash_console_flush()
* Function to force a write of all buffered
* data that hasn't been output.
* Out : return -1 on error else return 0.
* Clobber list : r0 - r1
* ---------------------------------------------
*/
func plat_crash_console_flush
mov_imm x1, PLAT_LS1043_UART_BASE
b console_core_flush
endfunc plat_crash_console_flush
#endif
/* ---------------------------------------------------------------------
* We don't need to carry out any memory initialization on LS
* platforms. The Secure SRAM is accessible straight away.
......
plat/marvell/common/marvell_common.mk
View file @ 39c92b62
......@@ -11,8 +11,6 @@ include $(MARVELL_PLAT_BASE)/marvell.mk
VERSION_STRING +=(Marvell-${SUBVERSION})
MULTI_CONSOLE_API := 1
SEPARATE_CODE_AND_RODATA := 1
# flag to switch from PLL to ARO
......
plat/meson/gxbb/platform.mk
View file @ 39c92b62
......@@ -57,16 +57,9 @@ SEPARATE_CODE_AND_RODATA := 1
# Use Coherent memory
USE_COHERENT_MEM := 1
# Use multi console API
MULTI_CONSOLE_API := 1
# Verify build config
# -------------------
ifneq (${MULTI_CONSOLE_API}, 1)
$(error Error: gxbb needs MULTI_CONSOLE_API=1)
endif
ifneq (${RESET_TO_BL31}, 0)
$(error Error: gxbb needs RESET_TO_BL31=0)
endif
......
plat/meson/gxl/platform.mk
View file @ 39c92b62
......@@ -62,16 +62,9 @@ SEPARATE_CODE_AND_RODATA := 1
# Use Coherent memory
USE_COHERENT_MEM := 1
# Use multi console API
MULTI_CONSOLE_API := 1
# Verify build config
# -------------------
ifneq (${MULTI_CONSOLE_API}, 1)
$(error Error: gxl needs MULTI_CONSOLE_API=1)
endif
ifneq (${RESET_TO_BL31}, 0)
$(error Error: gxl needs RESET_TO_BL31=0)
endif
......
plat/qemu/aarch32/plat_helpers.S
View file @ 39c92b62
......@@ -103,7 +103,7 @@ func plat_crash_console_init
mov_imm r0, PLAT_QEMU_CRASH_UART_BASE
mov_imm r1, PLAT_QEMU_CRASH_UART_CLK_IN_HZ
mov_imm r2, PLAT_QEMU_CONSOLE_BAUDRATE
b console_core_init
b console_pl011_core_init
endfunc plat_crash_console_init
/* ---------------------------------------------
......@@ -115,7 +115,7 @@ endfunc plat_crash_console_init
*/
func plat_crash_console_putc
mov_imm r1, PLAT_QEMU_CRASH_UART_BASE
b console_core_putc
b console_pl011_core_putc
endfunc plat_crash_console_putc
/* ---------------------------------------------
......@@ -128,6 +128,6 @@ endfunc plat_crash_console_putc
*/
func plat_crash_console_flush
mov_imm r0, PLAT_QEMU_CRASH_UART_BASE
b console_core_flush
b console_pl011_core_flush
endfunc plat_crash_console_flush
plat/qemu/platform.mk
View file @ 39c92b62
......@@ -151,12 +151,6 @@ ifneq ($(ENABLE_STACK_PROTECTOR), 0)
PLAT_BL_COMMON_SOURCES += plat/qemu/qemu_stack_protector.c
endif
# Use MULTI_CONSOLE_API by default only on AArch64
# as it is not yet supported on AArch32
ifeq ($(ARCH),aarch64)
MULTI_CONSOLE_API := 1
endif
BL32_RAM_LOCATION := tdram
ifeq (${BL32_RAM_LOCATION}, tsram)
BL32_RAM_LOCATION_ID = SEC_SRAM_ID
......
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