Unverified Commit 3ccfcd6e authored by Soby Mathew's avatar Soby Mathew Committed by GitHub
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Merge pull request #1587 from antonio-nino-diaz-arm/an/deprecated

Remove deprecated interfaces for all platforms
parents 9a983cfe 991f1f4d
...@@ -42,14 +42,8 @@ ERRATA_A53_835769 := 1 ...@@ -42,14 +42,8 @@ ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1 ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1 ERRATA_A53_855873 := 1
# Disable the PSCI platform compatibility layer.
ENABLE_PLAT_COMPAT := 0
MULTI_CONSOLE_API := 1 MULTI_CONSOLE_API := 1
# Prohibit using deprecated interfaces. We rely on this for this platform.
ERROR_DEPRECATED := 1
# The reset vector can be changed for each CPU. # The reset vector can be changed for each CPU.
PROGRAMMABLE_RESET_ADDRESS := 1 PROGRAMMABLE_RESET_ADDRESS := 1
......
...@@ -44,14 +44,8 @@ ERRATA_A53_835769 := 1 ...@@ -44,14 +44,8 @@ ERRATA_A53_835769 := 1
ERRATA_A53_843419 := 1 ERRATA_A53_843419 := 1
ERRATA_A53_855873 := 1 ERRATA_A53_855873 := 1
# Disable the PSCI platform compatibility layer.
ENABLE_PLAT_COMPAT := 0
MULTI_CONSOLE_API := 1 MULTI_CONSOLE_API := 1
# Prohibit using deprecated interfaces. We rely on this for this platform.
ERROR_DEPRECATED := 1
# The reset vector can be changed for each CPU. # The reset vector can be changed for each CPU.
PROGRAMMABLE_RESET_ADDRESS := 1 PROGRAMMABLE_RESET_ADDRESS := 1
......
...@@ -24,7 +24,6 @@ ...@@ -24,7 +24,6 @@
/* Defines for GIC Driver build time selection */ /* Defines for GIC Driver build time selection */
#define FVP_GICV2 1 #define FVP_GICV2 1
#define FVP_GICV3 2 #define FVP_GICV3 2
#define FVP_GICV3_LEGACY 3
/******************************************************************************* /*******************************************************************************
* arm_config holds the characteristics of the differences between the three FVP * arm_config holds the characteristics of the differences between the three FVP
...@@ -92,9 +91,9 @@ const mmap_region_t plat_arm_mmap[] = { ...@@ -92,9 +91,9 @@ const mmap_region_t plat_arm_mmap[] = {
#if TRUSTED_BOARD_BOOT #if TRUSTED_BOARD_BOOT
/* To access the Root of Trust Public Key registers. */ /* To access the Root of Trust Public Key registers. */
MAP_DEVICE2, MAP_DEVICE2,
#if LOAD_IMAGE_V2 && !BL2_AT_EL3 #if !BL2_AT_EL3
ARM_MAP_BL1_RW, ARM_MAP_BL1_RW,
#endif /* LOAD_IMAGE_V2 && !BL2_AT_EL3 */ #endif
#endif /* TRUSTED_BOARD_BOOT */ #endif /* TRUSTED_BOARD_BOOT */
#if ENABLE_SPM #if ENABLE_SPM
ARM_SP_IMAGE_MMAP, ARM_SP_IMAGE_MMAP,
...@@ -399,7 +398,7 @@ void fvp_interconnect_disable(void) ...@@ -399,7 +398,7 @@ void fvp_interconnect_disable(void)
#endif #endif
} }
#if TRUSTED_BOARD_BOOT && LOAD_IMAGE_V2 #if TRUSTED_BOARD_BOOT
int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size) int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
{ {
assert(heap_addr != NULL); assert(heap_addr != NULL);
......
...@@ -145,12 +145,6 @@ ...@@ -145,12 +145,6 @@
* terminology. On a GICv2 system or mode, the lists will be merged and treated * terminology. On a GICv2 system or mode, the lists will be merged and treated
* as Group 0 interrupts. * as Group 0 interrupts.
*/ */
#define PLAT_ARM_G1S_IRQS ARM_G1S_IRQS, \
FVP_IRQ_TZ_WDOG, \
FVP_IRQ_SEC_SYS_TIMER
#define PLAT_ARM_G0_IRQS ARM_G0_IRQS
#define PLAT_ARM_G1S_IRQ_PROPS(grp) \ #define PLAT_ARM_G1S_IRQ_PROPS(grp) \
ARM_G1S_IRQ_PROPS(grp), \ ARM_G1S_IRQ_PROPS(grp), \
INTR_PROP_DESC(FVP_IRQ_TZ_WDOG, GIC_HIGHEST_SEC_PRIORITY, grp, \ INTR_PROP_DESC(FVP_IRQ_TZ_WDOG, GIC_HIGHEST_SEC_PRIORITY, grp, \
......
...@@ -69,19 +69,6 @@ FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ ...@@ -69,19 +69,6 @@ FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
plat/arm/common/arm_gicv2.c plat/arm/common/arm_gicv2.c
FVP_DT_PREFIX := fvp-base-gicv2-psci FVP_DT_PREFIX := fvp-base-gicv2-psci
else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3_LEGACY)
ifeq (${ARCH}, aarch32)
$(error "GICV3 Legacy driver not supported for AArch32 build")
endif
FVP_GIC_SOURCES := drivers/arm/gic/arm_gic.c \
drivers/arm/gic/gic_v2.c \
drivers/arm/gic/gic_v3.c \
plat/common/plat_gic.c \
plat/arm/common/arm_gicv3_legacy.c
FVP_DT_PREFIX := fvp-base-gicv2-psci
else else
$(error "Incorrect GIC driver chosen on FVP port") $(error "Incorrect GIC driver chosen on FVP port")
endif endif
...@@ -208,9 +195,6 @@ $(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS ...@@ -208,9 +195,6 @@ $(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) $(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
endif endif
# Disable the PSCI platform compatibility layer
ENABLE_PLAT_COMPAT := 0
# Enable Activity Monitor Unit extensions by default # Enable Activity Monitor Unit extensions by default
ENABLE_AMU := 1 ENABLE_AMU := 1
...@@ -247,9 +231,7 @@ include plat/arm/board/common/board_common.mk ...@@ -247,9 +231,7 @@ include plat/arm/board/common/board_common.mk
include plat/arm/common/arm_common.mk include plat/arm/common/arm_common.mk
# FVP being a development platform, enable capability to disable Authentication # FVP being a development platform, enable capability to disable Authentication
# dynamically if TRUSTED_BOARD_BOOT and LOAD_IMAGE_V2 is set. # dynamically if TRUSTED_BOARD_BOOT is set.
ifeq (${TRUSTED_BOARD_BOOT}, 1) ifeq (${TRUSTED_BOARD_BOOT}, 1)
ifeq (${LOAD_IMAGE_V2}, 1)
DYN_DISABLE_AUTH := 1 DYN_DISABLE_AUTH := 1
endif
endif endif
...@@ -115,9 +115,6 @@ ERRATA_A72_859971 := 0 ...@@ -115,9 +115,6 @@ ERRATA_A72_859971 := 0
# power down sequence # power down sequence
SKIP_A57_L1_FLUSH_PWR_DWN := 1 SKIP_A57_L1_FLUSH_PWR_DWN := 1
# Disable the PSCI platform compatibility layer
ENABLE_PLAT_COMPAT := 0
# Enable memory map related constants optimisation # Enable memory map related constants optimisation
ARM_BOARD_OPTIMISE_MEM := 1 ARM_BOARD_OPTIMISE_MEM := 1
......
...@@ -76,16 +76,6 @@ void arm_bl1_early_platform_setup(void) ...@@ -76,16 +76,6 @@ void arm_bl1_early_platform_setup(void)
/* Allow BL1 to see the whole Trusted RAM */ /* Allow BL1 to see the whole Trusted RAM */
bl1_tzram_layout.total_base = ARM_BL_RAM_BASE; bl1_tzram_layout.total_base = ARM_BL_RAM_BASE;
bl1_tzram_layout.total_size = ARM_BL_RAM_SIZE; bl1_tzram_layout.total_size = ARM_BL_RAM_SIZE;
#if !LOAD_IMAGE_V2
/* Calculate how much RAM BL1 is using and how much remains free */
bl1_tzram_layout.free_base = ARM_BL_RAM_BASE;
bl1_tzram_layout.free_size = ARM_BL_RAM_SIZE;
reserve_mem(&bl1_tzram_layout.free_base,
&bl1_tzram_layout.free_size,
BL1_RAM_BASE,
BL1_RAM_LIMIT - BL1_RAM_BASE);
#endif /* LOAD_IMAGE_V2 */
} }
void bl1_early_platform_setup(void) void bl1_early_platform_setup(void)
...@@ -155,13 +145,12 @@ void arm_bl1_platform_setup(void) ...@@ -155,13 +145,12 @@ void arm_bl1_platform_setup(void)
{ {
/* Initialise the IO layer and register platform IO devices */ /* Initialise the IO layer and register platform IO devices */
plat_arm_io_setup(); plat_arm_io_setup();
#if LOAD_IMAGE_V2
arm_load_tb_fw_config(); arm_load_tb_fw_config();
#if TRUSTED_BOARD_BOOT #if TRUSTED_BOARD_BOOT
/* Share the Mbed TLS heap info with other images */ /* Share the Mbed TLS heap info with other images */
arm_bl1_set_mbedtls_heap(); arm_bl1_set_mbedtls_heap();
#endif /* TRUSTED_BOARD_BOOT */ #endif /* TRUSTED_BOARD_BOOT */
#endif /* LOAD_IMAGE_V2 */
/* /*
* Allow access to the System counter timer module and program * Allow access to the System counter timer module and program
* counter frequency for non secure images during FWU * counter frequency for non secure images during FWU
......
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...@@ -21,9 +21,7 @@ ...@@ -21,9 +21,7 @@
/* Conditionally provide a weak definition of plat_get_syscnt_freq2 to avoid /* Conditionally provide a weak definition of plat_get_syscnt_freq2 to avoid
* conflicts with the definition in plat/common. */ * conflicts with the definition in plat/common. */
#if ERROR_DEPRECATED
#pragma weak plat_get_syscnt_freq2 #pragma weak plat_get_syscnt_freq2
#endif
void arm_setup_romlib(void) void arm_setup_romlib(void)
......
...@@ -122,17 +122,11 @@ ENABLE_PMF := 1 ...@@ -122,17 +122,11 @@ ENABLE_PMF := 1
# mapping the former as executable and the latter as execute-never. # mapping the former as executable and the latter as execute-never.
SEPARATE_CODE_AND_RODATA := 1 SEPARATE_CODE_AND_RODATA := 1
# Enable new version of image loading on ARM platforms
LOAD_IMAGE_V2 := 1
# Use the multi console API, which is only available for AArch64 for now # Use the multi console API, which is only available for AArch64 for now
ifeq (${ARCH}, aarch64) ifeq (${ARCH}, aarch64)
MULTI_CONSOLE_API := 1 MULTI_CONSOLE_API := 1
endif endif
# Use generic OID definition (tbbr_oid.h)
USE_TBBR_DEFS := 1
# Disable ARM Cryptocell by default # Disable ARM Cryptocell by default
ARM_CRYPTOCELL_INTEG := 0 ARM_CRYPTOCELL_INTEG := 0
$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) $(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
...@@ -202,7 +196,6 @@ ifeq (${BL2_AT_EL3},1) ...@@ -202,7 +196,6 @@ ifeq (${BL2_AT_EL3},1)
BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
endif endif
ifeq (${LOAD_IMAGE_V2},1)
# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use # Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
# the AArch32 descriptors. # the AArch32 descriptors.
ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
...@@ -215,7 +208,6 @@ BL2_SOURCES += plat/arm/common/arm_image_load.c \ ...@@ -215,7 +208,6 @@ BL2_SOURCES += plat/arm/common/arm_image_load.c \
ifeq (${SPD},opteed) ifeq (${SPD},opteed)
BL2_SOURCES += lib/optee/optee_utils.c BL2_SOURCES += lib/optee/optee_utils.c
endif endif
endif
BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \ drivers/delay_timer/generic_delay_timer.c \
......
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