Commit 3ee148d6 authored by joanna.farley's avatar joanna.farley Committed by TrustedFirmware Code Review
Browse files

Merge changes from topics "af/add_measured_boot_bl1_bl2",...

Merge changes from topics "af/add_measured_boot_bl1_bl2", "af/add_measured_boot_driver", "af/add_measured_boot_driver_support", "af/add_measured_boot_fconf", "af/add_measured_boot_fvp" into integration

* changes:
  plat/arm/board/fvp: Add support for Measured Boot
  TF-A: Add support for Measured Boot driver to FCONF
  TF-A: Add support for Measured Boot driver in BL1 and BL2
  TF-A: Add Event Log for Measured Boot
  TF-A: Add support for Measured Boot driver
parents 43f7d887 4a135bc3
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -7,5 +7,13 @@
/dts-v1/;
/ {
#if MEASURED_BOOT
#include "event_log.dtsi"
#endif
};
#if MEASURED_BOOT && defined(SPD_opteed)
&event_log {
tpm_event_log_sm_addr = <0x0 0x0>;
};
#endif
/*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -7,5 +7,7 @@
/dts-v1/;
/ {
#if MEASURED_BOOT
#include "event_log.dtsi"
#endif
};
......@@ -69,6 +69,14 @@ __dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
}
#if MEASURED_BOOT
/*
* Calculates and writes BL2 hash data to TB_FW_CONFIG DTB.
*/
void bl1_plat_set_bl2_hash(const image_desc_t *image_desc)
{
arm_bl1_set_bl2_hash(image_desc);
}
/*
* Implementation for bl1_plat_handle_post_image_load(). This function
* populates the default arguments to BL2. The BL2 memory layout structure
......@@ -90,7 +98,7 @@ int bl1_plat_handle_post_image_load(unsigned int image_id)
assert(image_desc != NULL);
/* Calculate BL2 hash and set it in TB_FW_CONFIG */
arm_bl1_set_bl2_hash(image_desc);
bl1_plat_set_bl2_hash(image_desc);
/* Get the entry point info */
ep_info = &image_desc->ep_info;
......
......@@ -6,8 +6,12 @@
#include <assert.h>
#include <common/debug.h>
#include <common/desc_image_load.h>
#include <drivers/arm/sp804_delay_timer.h>
#if MEASURED_BOOT
#include <drivers/measured_boot/measured_boot.h>
#endif
#include <lib/fconf/fconf.h>
#include <lib/fconf/fconf_dyn_cfg_getter.h>
......@@ -69,3 +73,45 @@ struct bl_params *plat_get_next_bl_params(void)
return arm_bl_params;
}
#if MEASURED_BOOT
static int fvp_bl2_plat_handle_post_image_load(unsigned int image_id)
{
const bl_mem_params_node_t *bl_mem_params =
get_bl_mem_params_node(image_id);
assert(bl_mem_params != NULL);
image_info_t info = bl_mem_params->image_info;
int err;
if ((info.h.attr & IMAGE_ATTRIB_SKIP_LOADING) == 0U) {
/* Calculate image hash and record data in Event Log */
err = tpm_record_measurement(info.image_base,
info.image_size, image_id);
if (err != 0) {
ERROR("%s%s image id %u (%i)\n",
"BL2: Failed to ", "record", image_id, err);
return err;
}
}
err = arm_bl2_handle_post_image_load(image_id);
if (err != 0) {
ERROR("%s%s image id %u (%i)\n",
"BL2: Failed to ", "handle", image_id, err);
}
return err;
}
int arm_bl2_plat_handle_post_image_load(unsigned int image_id)
{
int err = fvp_bl2_plat_handle_post_image_load(image_id);
if (err != 0) {
ERROR("%s() returns %i\n", __func__, err);
}
return err;
}
#endif /* MEASURED_BOOT */
/*
* Copyright (c) 2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <drivers/measured_boot/event_log.h>
#include <plat/arm/common/plat_arm.h>
/* FVP table with platform specific image IDs, names and PCRs */
static const image_data_t fvp_images_data[] = {
{ BL2_IMAGE_ID, BL2_STRING, PCR_0 }, /* Reserved for BL2 */
{ BL31_IMAGE_ID, BL31_STRING, PCR_0 },
{ BL32_IMAGE_ID, BL32_STRING, PCR_0 },
{ BL32_EXTRA1_IMAGE_ID, BL32_EXTRA1_IMAGE_STRING, PCR_0 },
{ BL32_EXTRA2_IMAGE_ID, BL32_EXTRA2_IMAGE_STRING, PCR_0 },
{ BL33_IMAGE_ID, BL33_STRING, PCR_0 },
{ GPT_IMAGE_ID, GPT_IMAGE_STRING, PCR_0 },
{ HW_CONFIG_ID, HW_CONFIG_STRING, PCR_0 },
{ NT_FW_CONFIG_ID, NT_FW_CONFIG_STRING, PCR_0 },
{ SCP_BL2_IMAGE_ID, SCP_BL2_IMAGE_STRING, PCR_0 },
{ SOC_FW_CONFIG_ID, SOC_FW_CONFIG_STRING, PCR_0 },
{ STM32_IMAGE_ID, STM32_IMAGE_STRING, PCR_0 },
{ TOS_FW_CONFIG_ID, TOS_FW_CONFIG_STRING, PCR_0 },
{ INVALID_ID, NULL, (unsigned int)(-1) } /* Terminator */
};
static const measured_boot_data_t fvp_measured_boot_data = {
fvp_images_data,
arm_set_nt_fw_info,
arm_set_tos_fw_info
};
/*
* Function retuns pointer to FVP plat_measured_boot_data_t structure
*/
const measured_boot_data_t *plat_get_measured_boot_data(void)
{
return &fvp_measured_boot_data;
}
/*
* Copyright (c) 2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef FCONF_NT_CONFIG_GETTER_H
#define FCONF_NT_CONFIG_GETTER_H
#include <lib/fconf/fconf.h>
/* NT Firmware Config related getter */
#define nt_config__event_log_config_getter(prop) event_log.prop
struct event_log_config_t {
#ifdef SPD_opteed
void *tpm_event_log_sm_addr;
#endif
void *tpm_event_log_addr;
size_t tpm_event_log_size;
};
int fconf_populate_event_log_config(uintptr_t config);
extern struct event_log_config_t event_log_config;
#endif /* FCONF_NT_CONFIG_GETTER_H */
......@@ -243,8 +243,8 @@
/*
* GIC related constants to cater for both GICv2 and GICv3 instances of an
* FVP. They could be overriden at runtime in case the FVP implements the legacy
* VE memory map.
* FVP. They could be overridden at runtime in case the FVP implements the
* legacy VE memory map.
*/
#define PLAT_ARM_GICD_BASE BASE_GICD_BASE
#define PLAT_ARM_GICR_BASE BASE_GICR_BASE
......
......@@ -354,6 +354,11 @@ include plat/arm/common/arm_common.mk
ifeq (${TRUSTED_BOARD_BOOT}, 1)
BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
ifeq (${MEASURED_BOOT},1)
BL2_SOURCES += plat/arm/board/fvp/fvp_measured_boot.c
endif
# FVP being a development platform, enable capability to disable Authentication
# dynamically if TRUSTED_BOARD_BOOT is set.
DYN_DISABLE_AUTH := 1
......
......@@ -37,6 +37,9 @@ CASSERT(BL2_BASE >= ARM_FW_CONFIG_LIMIT, assert_bl2_base_overflows);
#pragma weak bl2_platform_setup
#pragma weak bl2_plat_arch_setup
#pragma weak bl2_plat_sec_mem_layout
#if MEASURED_BOOT
#pragma weak bl2_plat_get_hash
#endif
#define MAP_BL2_TOTAL MAP_REGION_FLAT( \
bl2_tzram_layout.total_base, \
......@@ -225,3 +228,11 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
{
return arm_bl2_plat_handle_post_image_load(image_id);
}
#if MEASURED_BOOT
/* Read TCG_DIGEST_SIZE bytes of BL2 hash data */
void bl2_plat_get_hash(void *data)
{
arm_bl2_get_hash(data);
}
#endif
......@@ -337,3 +337,9 @@ ifeq (${RECLAIM_INIT_CODE}, 1)
$(error "To reclaim init code xlat tables v2 must be used")
endif
endif
ifeq (${MEASURED_BOOT},1)
MEASURED_BOOT_MK := drivers/measured_boot/measured_boot.mk
$(info Including ${MEASURED_BOOT_MK})
include ${MEASURED_BOOT_MK}
endif
......@@ -23,6 +23,7 @@
#include <lib/fconf/fconf.h>
#include <lib/fconf/fconf_dyn_cfg_getter.h>
#include <lib/fconf/fconf_tbbr_getter.h>
#include <plat/arm/common/arm_dyn_cfg_helpers.h>
#include <plat/arm/common/plat_arm.h>
......@@ -98,13 +99,14 @@ void arm_bl1_set_mbedtls_heap(void)
tb_fw_cfg_dtb = tb_fw_config_info->config_addr;
if ((tb_fw_cfg_dtb != 0UL) && (mbedtls_heap_addr != NULL)) {
/* As libfdt use void *, we can't avoid this cast */
/* As libfdt uses void *, we can't avoid this cast */
void *dtb = (void *)tb_fw_cfg_dtb;
err = arm_set_dtb_mbedtls_heap_info(dtb,
mbedtls_heap_addr, mbedtls_heap_size);
if (err < 0) {
ERROR("BL1: unable to write shared Mbed TLS heap information to DTB\n");
ERROR("%swrite shared Mbed TLS heap information%s",
"BL1: unable to ", " to DTB\n");
panic();
}
#if !MEASURED_BOOT
......@@ -124,13 +126,13 @@ void arm_bl1_set_mbedtls_heap(void)
#if MEASURED_BOOT
/*
* Puts the BL2 hash data to TB_FW_CONFIG DTB.
* Calculates and writes BL2 hash data to TB_FW_CONFIG DTB.
* Executed only from BL1.
*/
void arm_bl1_set_bl2_hash(image_desc_t *image_desc)
void arm_bl1_set_bl2_hash(const image_desc_t *image_desc)
{
unsigned char hash_data[MBEDTLS_MD_MAX_SIZE];
image_info_t image_info = image_desc->image_info;
const image_info_t image_info = image_desc->image_info;
uintptr_t tb_fw_cfg_dtb;
int err;
const struct dyn_cfg_dtb_info_t *tb_fw_config_info;
......@@ -154,13 +156,15 @@ void arm_bl1_set_bl2_hash(image_desc_t *image_desc)
(void *)image_info.image_base,
image_info.image_size, hash_data);
if (err != 0) {
ERROR("BL1: unable to calculate BL2 hash\n");
ERROR("%scalculate%s\n", "BL1: unable to ",
" BL2 hash");
panic();
}
err = arm_set_bl2_hash_info((void *)tb_fw_cfg_dtb, hash_data);
if (err < 0) {
ERROR("BL1: unable to write BL2 hash data to DTB\n");
ERROR("%swrite%sdata%s\n", "BL1: unable to ",
" BL2 hash ", "to DTB\n");
panic();
}
......@@ -171,6 +175,21 @@ void arm_bl1_set_bl2_hash(image_desc_t *image_desc)
*/
flush_dcache_range(tb_fw_cfg_dtb, fdt_totalsize((void *)tb_fw_cfg_dtb));
}
/*
* Reads TCG_DIGEST_SIZE bytes of BL2 hash data from the DTB.
* Executed only from BL2.
*/
void arm_bl2_get_hash(void *data)
{
const void *bl2_hash;
assert(data != NULL);
/* Retrieve TCG_DIGEST_SIZE bytes of BL2 hash data from the DTB */
bl2_hash = FCONF_GET_PROPERTY(tbbr, dyn_config, bl2_hash_data);
(void)memcpy(data, bl2_hash, TCG_DIGEST_SIZE);
}
#endif /* MEASURED_BOOT */
#endif /* TRUSTED_BOARD_BOOT */
......@@ -202,14 +221,15 @@ void arm_bl2_dyn_cfg_init(void)
/* Get the config load address and size from TB_FW_CONFIG */
cfg_mem_params = get_bl_mem_params_node(config_ids[i]);
if (cfg_mem_params == NULL) {
VERBOSE("Couldn't find HW_CONFIG in bl_mem_params_node\n");
VERBOSE("%sHW_CONFIG in bl_mem_params_node\n",
"Couldn't find ");
continue;
}
dtb_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, config_ids[i]);
if (dtb_info == NULL) {
VERBOSE("Couldn't find config_id %d load info in TB_FW_CONFIG\n",
config_ids[i]);
VERBOSE("%sconfig_id %d load info in TB_FW_CONFIG\n",
"Couldn't find ", config_ids[i]);
continue;
}
......@@ -223,30 +243,32 @@ void arm_bl2_dyn_cfg_init(void)
*/
if (config_ids[i] != HW_CONFIG_ID) {
if (check_uptr_overflow(image_base, image_size))
if (check_uptr_overflow(image_base, image_size)) {
continue;
}
#ifdef BL31_BASE
/* Ensure the configs don't overlap with BL31 */
if ((image_base >= BL31_BASE) &&
(image_base <= BL31_LIMIT))
(image_base <= BL31_LIMIT)) {
continue;
}
#endif
/* Ensure the configs are loaded in a valid address */
if (image_base < ARM_BL_RAM_BASE)
if (image_base < ARM_BL_RAM_BASE) {
continue;
}
#ifdef BL32_BASE
/*
* If BL32 is present, ensure that the configs don't
* overlap with it.
*/
if ((image_base >= BL32_BASE) &&
(image_base <= BL32_LIMIT))
(image_base <= BL32_LIMIT)) {
continue;
}
#endif
}
cfg_mem_params->image_info.image_base = image_base;
cfg_mem_params->image_info.image_max_size = (uint32_t)image_size;
......
......@@ -6,9 +6,13 @@
#include <assert.h>
#if MEASURED_BOOT
#include <common/desc_image_load.h>
#endif
#include <common/fdt_wrappers.h>
#include <libfdt.h>
#include <common/fdt_wrappers.h>
#include <plat/arm/common/arm_dyn_cfg_helpers.h>
#include <plat/arm/common/plat_arm.h>
......@@ -17,6 +21,15 @@
#if MEASURED_BOOT
#define DTB_PROP_BL2_HASH_DATA "bl2_hash_data"
#ifdef SPD_opteed
/*
* Currently OP-TEE does not support reading DTBs from Secure memory
* and this property should be removed when this feature is supported.
*/
#define DTB_PROP_HW_SM_LOG_ADDR "tpm_event_log_sm_addr"
#endif
#define DTB_PROP_HW_LOG_ADDR "tpm_event_log_addr"
#define DTB_PROP_HW_LOG_SIZE "tpm_event_log_size"
static int dtb_root = -1;
#endif /* MEASURED_BOOT */
......@@ -37,18 +50,19 @@ int arm_dyn_tb_fw_cfg_init(void *dtb, int *node)
/* Check if the pointer to DT is correct */
if (fdt_check_header(dtb) != 0) {
WARN("Invalid DTB file passed as TB_FW_CONFIG\n");
WARN("Invalid DTB file passed as%s\n", " TB_FW_CONFIG");
return -1;
}
/* Assert the node offset point to "arm,tb_fw" compatible property */
*node = fdt_node_offset_by_compatible(dtb, -1, "arm,tb_fw");
if (*node < 0) {
WARN("The compatible property `arm,tb_fw` not found in the config\n");
WARN("The compatible property '%s' not%s", "arm,tb_fw",
" found in the config\n");
return -1;
}
VERBOSE("Dyn cfg: Found \"arm,tb_fw\" in the config\n");
VERBOSE("Dyn cfg: '%s'%s", "arm,tb_fw", " found in the config\n");
return 0;
}
......@@ -76,7 +90,8 @@ int arm_set_dtb_mbedtls_heap_info(void *dtb, void *heap_addr, size_t heap_size)
*/
int err = arm_dyn_tb_fw_cfg_init(dtb, &dtb_root);
if (err < 0) {
ERROR("Invalid TB_FW_CONFIG loaded. Unable to get root node\n");
ERROR("Invalid%s loaded. Unable to get root node\n",
" TB_FW_CONFIG");
return -1;
}
......@@ -90,16 +105,16 @@ int arm_set_dtb_mbedtls_heap_info(void *dtb, void *heap_addr, size_t heap_size)
err = fdtw_write_inplace_cells(dtb, dtb_root,
DTB_PROP_MBEDTLS_HEAP_ADDR, 2, &heap_addr);
if (err < 0) {
ERROR("Unable to write DTB property %s\n",
DTB_PROP_MBEDTLS_HEAP_ADDR);
ERROR("%sDTB property '%s'\n",
"Unable to write ", DTB_PROP_MBEDTLS_HEAP_ADDR);
return -1;
}
err = fdtw_write_inplace_cells(dtb, dtb_root,
DTB_PROP_MBEDTLS_HEAP_SIZE, 1, &heap_size);
if (err < 0) {
ERROR("Unable to write DTB property %s\n",
DTB_PROP_MBEDTLS_HEAP_SIZE);
ERROR("%sDTB property '%s'\n",
"Unable to write ", DTB_PROP_MBEDTLS_HEAP_SIZE);
return -1;
}
......@@ -124,7 +139,165 @@ int arm_set_bl2_hash_info(void *dtb, void *data)
/*
* Write the BL2 hash data in the DTB.
*/
return fdtw_write_inplace_bytes(dtb, dtb_root, DTB_PROP_BL2_HASH_DATA,
return fdtw_write_inplace_bytes(dtb, dtb_root,
DTB_PROP_BL2_HASH_DATA,
TCG_DIGEST_SIZE, data);
}
/*
* Write the Event Log address and its size in the DTB.
*
* This function is supposed to be called only by BL2.
*
* Returns:
* 0 = success
* < 0 = error
*/
static int arm_set_event_log_info(uintptr_t config_base,
#ifdef SPD_opteed
uintptr_t sm_log_addr,
#endif
uintptr_t log_addr, size_t log_size)
{
/* As libfdt uses void *, we can't avoid this cast */
void *dtb = (void *)config_base;
const char *compatible = "arm,tpm_event_log";
int err, node;
/*
* Verify that the DTB is valid, before attempting to write to it,
* and get the DTB root node.
*/
/* Check if the pointer to DT is correct */
err = fdt_check_header(dtb);
if (err < 0) {
WARN("Invalid DTB file passed\n");
return err;
}
/* Assert the node offset point to compatible property */
node = fdt_node_offset_by_compatible(dtb, -1, compatible);
if (node < 0) {
WARN("The compatible property '%s' not%s", compatible,
" found in the config\n");
return node;
}
VERBOSE("Dyn cfg: '%s'%s", compatible, " found in the config\n");
#ifdef SPD_opteed
if (sm_log_addr != 0UL) {
err = fdtw_write_inplace_cells(dtb, node,
DTB_PROP_HW_SM_LOG_ADDR, 2, &sm_log_addr);
if (err < 0) {
ERROR("%sDTB property '%s'\n",
"Unable to write ", DTB_PROP_HW_SM_LOG_ADDR);
return err;
}
}
#endif
err = fdtw_write_inplace_cells(dtb, node,
DTB_PROP_HW_LOG_ADDR, 2, &log_addr);
if (err < 0) {
ERROR("%sDTB property '%s'\n",
"Unable to write ", DTB_PROP_HW_LOG_ADDR);
return err;
}
err = fdtw_write_inplace_cells(dtb, node,
DTB_PROP_HW_LOG_SIZE, 1, &log_size);
if (err < 0) {
ERROR("%sDTB property '%s'\n",
"Unable to write ", DTB_PROP_HW_LOG_SIZE);
} else {
/*
* Ensure that the info written to the DTB is visible
* to other images.
*/
flush_dcache_range(config_base, fdt_totalsize(dtb));
}
return err;
}
/*
* This function writes the Event Log address and its size
* in the TOS_FW_CONFIG DTB.
*
* This function is supposed to be called only by BL2.
*
* Returns:
* 0 = success
* < 0 = error
*/
int arm_set_tos_fw_info(uintptr_t config_base, uintptr_t log_addr,
size_t log_size)
{
int err;
assert(config_base != 0UL);
assert(log_addr != 0UL);
/* Write the Event Log address and its size in the DTB */
err = arm_set_event_log_info(config_base,
#ifdef SPD_opteed
0UL,
#endif
log_addr, log_size);
if (err < 0) {
ERROR("%sEvent Log data to TOS_FW_CONFIG\n",
"Unable to write ");
}
return err;
}
/*
* This function writes the Event Log address and its size
* in the NT_FW_CONFIG DTB.
*
* This function is supposed to be called only by BL2.
*
* Returns:
* 0 = success
* < 0 = error
*/
int arm_set_nt_fw_info(uintptr_t config_base,
#ifdef SPD_opteed
uintptr_t log_addr,
#endif
size_t log_size, uintptr_t *ns_log_addr)
{
uintptr_t ns_addr;
const bl_mem_params_node_t *cfg_mem_params;
int err;
assert(config_base != 0UL);
assert(ns_log_addr != NULL);
/* Get the config load address and size from NT_FW_CONFIG */
cfg_mem_params = get_bl_mem_params_node(NT_FW_CONFIG_ID);
assert(cfg_mem_params != NULL);
/* Calculate Event Log address in Non-secure memory */
ns_addr = cfg_mem_params->image_info.image_base +
cfg_mem_params->image_info.image_max_size;
/* Check for memory space */
if ((uint64_t)(ns_addr + log_size) > ARM_NS_DRAM1_END) {
return -1;
}
/* Write the Event Log address and its size in the DTB */
err = arm_set_event_log_info(config_base,
#ifdef SPD_opteed
log_addr,
#endif
ns_addr, log_size);
/* Return Event Log address in Non-secure memory */
*ns_log_addr = (err < 0) ? 0UL : ns_addr;
return err;
}
#endif /* MEASURED_BOOT */
/*
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
......@@ -27,7 +27,9 @@
#pragma weak bl1_plat_fwu_done
#pragma weak bl1_plat_handle_pre_image_load
#pragma weak bl1_plat_handle_post_image_load
#if MEASURED_BOOT
#pragma weak bl1_plat_set_bl2_hash
#endif
unsigned int bl1_plat_get_next_image_id(void)
{
......@@ -116,3 +118,12 @@ int bl1_plat_handle_post_image_load(unsigned int image_id)
(void *) bl2_tzram_layout);
return 0;
}
#if MEASURED_BOOT
/*
* Calculates and writes BL2 hash data to TB_FW_CONFIG DTB.
*/
void bl1_plat_set_bl2_hash(const image_desc_t *image_desc)
{
}
#endif
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