From 3f0d4f1bd5fff2de5d6afedba04c799b5de55b72 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 7 Feb 2018 13:13:01 +0530 Subject: [PATCH] plat: xilinx: zynqmp: Make fpga load blocking until completed This patch makes bitstream load blocking call and waits until bitstream is loaded successfully or return with error. Signed-off-by: Siva Durga Prasad Paladugu Tested-by: Avesh Khan --- plat/xilinx/zynqmp/pm_service/pm_api_sys.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/xilinx/zynqmp/pm_service/pm_api_sys.c b/plat/xilinx/zynqmp/pm_service/pm_api_sys.c index 07c04e724..69bd53b2f 100644 --- a/plat/xilinx/zynqmp/pm_service/pm_api_sys.c +++ b/plat/xilinx/zynqmp/pm_service/pm_api_sys.c @@ -538,7 +538,7 @@ enum pm_ret_status pm_fpga_load(uint32_t address_low, /* Send request to the PMU */ PM_PACK_PAYLOAD5(payload, PM_FPGA_LOAD, address_high, address_low, size, flags); - return pm_ipi_send(primary_proc, payload); + return pm_ipi_send_sync(primary_proc, payload, NULL, 0); } /** -- GitLab