From 43ef4f1ee759db2c5a47f8db5f789ce3f803d69a Mon Sep 17 00:00:00 2001 From: Harry Liebel Date: Tue, 22 Oct 2013 17:29:14 +0100 Subject: [PATCH] FDTs for v5.2 Foundation model - The Foundation FVP is a cut down version of the Base FVP and as such lacks some components. - Three FDTs are provided. fvp-foundation-gicv2legacy-psci: Use this when setting the Foundation FVP to use GICv2. In this mode the GIC is located at the VE location, as described in the VE platform memory map. fvp-foundation-gicv3-psci : Use this when setting the Foundation FVP to use GICv3. In this mode the GIC is located at the Base location, as described in the Base platform memory map. fvp-foundation-gicv2-psci : Use this when setting the Foundation FVP to use GICv3, but Linux is expected to use GICv2 emulation mode. In this mode the GIC is located at the Base location, but the GICv3 is used in GICv2 emulation mode. Change-Id: I9d69bcef35c64cc8f16550efe077f578e55aaae5 --- fdts/fvp-foundation-gicv2-psci.dtb | Bin 0 -> 6798 bytes fdts/fvp-foundation-gicv2-psci.dts | 201 +++++++++++++++++++++++ fdts/fvp-foundation-gicv2legacy-psci.dtb | Bin 0 -> 6798 bytes fdts/fvp-foundation-gicv2legacy-psci.dts | 201 +++++++++++++++++++++++ fdts/fvp-foundation-gicv3-psci.dtb | Bin 0 -> 6770 bytes fdts/fvp-foundation-gicv3-psci.dts | 201 +++++++++++++++++++++++ fdts/fvp-foundation-motherboard.dtsi | 197 ++++++++++++++++++++++ 7 files changed, 800 insertions(+) create mode 100644 fdts/fvp-foundation-gicv2-psci.dtb create mode 100644 fdts/fvp-foundation-gicv2-psci.dts create mode 100644 fdts/fvp-foundation-gicv2legacy-psci.dtb create mode 100644 fdts/fvp-foundation-gicv2legacy-psci.dts create mode 100644 fdts/fvp-foundation-gicv3-psci.dtb create mode 100644 fdts/fvp-foundation-gicv3-psci.dts create mode 100644 fdts/fvp-foundation-motherboard.dtsi diff --git a/fdts/fvp-foundation-gicv2-psci.dtb b/fdts/fvp-foundation-gicv2-psci.dtb new file mode 100644 index 0000000000000000000000000000000000000000..d982e8567dfc3068e49e75b073901cc6c739da6d GIT binary patch literal 6798 zcmbtZOOGT+5zboMgAJIq&C8hAc!r0ux-`>0YrKmvv@LbLa7G*~PQGwA63Ft^@O_aL)lt*4qn&X|*%cXIWMpJiWMo$M zKc4*X-_AYvTj$)5oO|{yJYPV48uckulp7xh|GT8_^M@tyk8{7ueFXd`i2d;OpKQMt zHAyE&{&T2XQJs$#t16rkV`G(^RCUrcUXXH+qS6NH)bT((+Ch9&Hc5e&$Ac(K zp;@%C?;h$adrdyu%ggpCsb^(W&-c=DQ5{CpgVBCh_LfoIPWSJyNmVi~`~Kje`$ijm zfBevWXB&Ng_RxLfzAya~R85?60w|n6--Y=69G^b^MU%&P^gf>dZRqprt)b6PfK#W8 z6IaXbmG%8EdPmeBKz8cg+RMHP9x>`ejCmUo4y)Vbdj8{hzAY{PL)phre`n^RwoDli zD3sycuBu;S?Sc9y)P8;awDVH?4@CX7?WgVs=@%d6NnX~c)7y*|6plvukDniJ_wfk^6MV&p4t|@Y0)Niy{y_WE{nD@J{8+S&@9__)Iybg=P+7=h`7w@l zsq2%dXQ-6K`nkz*$>;O$sN`$=ovtmuXwy8Y!9XGY6spWw;yUb6VtfH-sMPhObN}O$ z^;3ragrTuUL`KJb_puND1#!O?Me}qL-5%?!mGM6VydVE%KYoaJ&3F*i(`yDM~V7ow5?8G~8TTPl*SrX2=jHmP8 z0Y-Uk(;u{!?Gse`qc2Qm-N1fEX!8YiJnE71EPgv4^+@>=emh?G@DA)6%vnetwix3>G13-e7%OH%8eHc-YcSHb-{%ZQ+G3wK z7-@@fiRgG{xq$0)iDH^p1i%l^pNf&TI=^Tz(iY?L(|%?tg6rIu4My7b`-;IxTkNX_ zBWm0&}cKQ*&|feBH>2khzBbm3>e@HAbsR9#&&_jl9k=ZB9kg?|TWqE{dd` zPDcB(^{vlXT%TJ_-o&FUD(;Nq@z@_$X&dta_q!WRn4PD|=QwAm>`N$!vwM?U`OzDo zS+wugB0WjwVVsrmJ>{csa7(0mf4Fyp;@gTN&jhc+1>d4tF1_L^pDzwPT=D?ckW!4z|UP zjZaBx^|H)O{`{5CA~`(_15WkrK#prn+x8s6{QVv(3vuVRsn1?yrx0f;0aP zVm zsZ@^nRgL3uoMf5Gcw4B&UpKHH)O9L%qB$W1vcqAMqZMbW{k7&$#tss;p`L~`-PnpvN~m*PKK+zi}lXd z^%v#^{=3vxo^Ch&$9KtUZKeIXF0W-PR_t{A^59#zf6vGh2bbmvo_sg$R6FqO^91ci zRtb&=S+VoiDy`eJygTC|0XxP)Z;hWXqkGHCjPg7!IcOKx*em4Au-_{<_8BVAU-S)Y zAZHNlM$0T}%UZAcLh(_>nR5I0h+t zcJUnSc_Um!Ez-jaw%mT)f3gp1fU9R5+OSo4U7YPeS11C6r7zdke?e;;ds~(#a-S?( zyd1xEhI(=@L`5i_e?=Gb8jI*^j+X7bJT5vfQjXt7LtQGwUPE2XNi3qPPG)7PE&G~ggRD@#ZC)pf4>N;PapyJHMWnM*XI?EEb zzEG^9Iw@MW8_nnZgCOMDp>exS`bN^xO;V>(w(tBC2YP8wy61t*aVjt84tLFWn`Kia zg{RBKLU?82=E*9Jle_I{l{kc{ONt0a;Fe4}?yimTgPV4L+qt&5aamd{Pe#>IRLn6I zIhBWtI{D=?DdJOCN5vujnvg59uvq3Z+!n4i=1~>qQFCv|l9bEu6@N(!iOTJI#oi=O zm&>+Vwqb$Gx5gb-X=$!w-L7Yd`$W9yO!MOF<;gbP;1_b3rv++Um#Z>sEk8QBkRN5o f(PvVoN{LiO5oQ@XDB6j}=Asbz< literal 0 HcmV?d00001 diff --git a/fdts/fvp-foundation-gicv2-psci.dts b/fdts/fvp-foundation-gicv2-psci.dts new file mode 100644 index 000000000..7924ff212 --- /dev/null +++ b/fdts/fvp-foundation-gicv2-psci.dts @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2013, ARM Limited. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of the ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +/memreserve/ 0x80000000 0x00010000; + +/ { +}; + +/ { + model = "FVP Base"; + compatible = "arm,fvp-base", "arm,vexpress"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + aliases { + serial0 = &v2m_serial0; + serial1 = &v2m_serial1; + serial2 = &v2m_serial2; + serial3 = &v2m_serial3; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x80000000>, + <0x00000008 0x80000000 0 0x80000000>; + }; + + gic: interrupt-controller@2f000000 { + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0x2f000000 0 0x10000>, + <0x0 0x2c000000 0 0x2000>, + <0x0 0x2c010000 0 0x2000>, + <0x0 0x2c02F000 0 0x2000>; + interrupts = <1 9 0xf04>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff01>, + <1 14 0xff01>, + <1 11 0xff01>, + <1 10 0xff01>; + clock-frequency = <100000000>; + }; + + timer@2a810000 { + compatible = "arm,armv7-timer-mem"; + reg = <0x0 0x2a810000 0x0 0x10000>; + clock-frequency = <100000000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + frame@2a820000 { + frame-number = <0>; + interrupts = <0 25 4>; + reg = <0x0 0x2a820000 0x0 0x10000>; + }; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0 60 4>, + <0 61 4>, + <0 62 4>, + <0 63 4>; + }; + + smb { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0 0x08000000 0x04000000>, + <1 0 0 0x14000000 0x04000000>, + <2 0 0 0x18000000 0x04000000>, + <3 0 0 0x1c000000 0x04000000>, + <4 0 0 0x0c000000 0x04000000>, + <5 0 0 0x10000000 0x04000000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 63>; + interrupt-map = <0 0 0 &gic 0 0 4>, + <0 0 1 &gic 0 1 4>, + <0 0 2 &gic 0 2 4>, + <0 0 3 &gic 0 3 4>, + <0 0 4 &gic 0 4 4>, + <0 0 5 &gic 0 5 4>, + <0 0 6 &gic 0 6 4>, + <0 0 7 &gic 0 7 4>, + <0 0 8 &gic 0 8 4>, + <0 0 9 &gic 0 9 4>, + <0 0 10 &gic 0 10 4>, + <0 0 11 &gic 0 11 4>, + <0 0 12 &gic 0 12 4>, + <0 0 13 &gic 0 13 4>, + <0 0 14 &gic 0 14 4>, + <0 0 15 &gic 0 15 4>, + <0 0 16 &gic 0 16 4>, + <0 0 17 &gic 0 17 4>, + <0 0 18 &gic 0 18 4>, + <0 0 19 &gic 0 19 4>, + <0 0 20 &gic 0 20 4>, + <0 0 21 &gic 0 21 4>, + <0 0 22 &gic 0 22 4>, + <0 0 23 &gic 0 23 4>, + <0 0 24 &gic 0 24 4>, + <0 0 25 &gic 0 25 4>, + <0 0 26 &gic 0 26 4>, + <0 0 27 &gic 0 27 4>, + <0 0 28 &gic 0 28 4>, + <0 0 29 &gic 0 29 4>, + <0 0 30 &gic 0 30 4>, + <0 0 31 &gic 0 31 4>, + <0 0 32 &gic 0 32 4>, + <0 0 33 &gic 0 33 4>, + <0 0 34 &gic 0 34 4>, + <0 0 35 &gic 0 35 4>, + <0 0 36 &gic 0 36 4>, + <0 0 37 &gic 0 37 4>, + <0 0 38 &gic 0 38 4>, + <0 0 39 &gic 0 39 4>, + <0 0 40 &gic 0 40 4>, + <0 0 41 &gic 0 41 4>, + <0 0 42 &gic 0 42 4>; + + /include/ "fvp-foundation-motherboard.dtsi" + }; +}; diff --git a/fdts/fvp-foundation-gicv2legacy-psci.dtb b/fdts/fvp-foundation-gicv2legacy-psci.dtb new file mode 100644 index 0000000000000000000000000000000000000000..849e68ac47b98c9b42c2e56cc159a66c53e2d4e5 GIT binary patch literal 6798 zcmbtZOOGT+5zbodu??8Dc^dN?&loUPmu9+Wjdu}-wj~f3OFn=PNNB09uAV7v*Mq9+ zdHCW5e6s`+cO=dnIPnWu&WMA>$rtYCU?Hx+_eEw@M@`SJcE%}XS7dyVk&#i6nNit) zfAYWoa_-sRIOl%k+%xas`2yCiq-z9aIKP-`docmSo$H0Gr*bm=)WBawF z&4L{H&!TQ6O)**=*YS)P8^_sc-DGX+1u6FkDs7-nZSR1-X4>P>j?$y5%}TU99wo~h znnfG??xDW2*A}zAqUw&aW>zK5d@rvS^ z`a}1fZS?)gL-$SlzVuI2w`tA^pm6?t7vl4CeERrjZIR;9`*{A>q0j4ghCV+9PMtDN zTCc(@>-%5yj;KF^?9{upmwg*NV$_Ei^EM(Jj&G9d`H$oIuC)9QWgkWTt(lA3GG#!Z zP=<56tbUEP`|6)i`_=W+&Ij6mAnLDdKXux1l z_%Kgp2T;~6;rOv=8{gyaQFU%?@1U}f$MPps(o*Pg7sW=3>}lc=RCEodobH9AD~8yCMh!7G8x!HU;UdxD3n(pv;9R>^)Y?sZTb}< z6mJv9WsT~h-#55sl}GYbRz8KKP=6nNAlhuP$@QZ)!RP(Zl;@l=#v^|Q|1)HmVg>s#fs?NopBCdB6eDdh&P6fO79*_~X^U}g zijlV1mcd9{jQg7QBW*Fh3dPK80oR|Git+5U{di6(M%rSG6U9hdjIpj5X^Ua)_ZVr5 zVK3-0(iXdJFwz!d80dH=B*0zgRZ81_p9WL=k+vA)Low18V;C!DLKK4&n}w%_Ls zM%rRuFc@izaf#@7X1Rdt_Y%c)Ul9O5%s&+)ZFPRhV5BX^<){73QUuqzuNaK9?e|rK zk+#^^3`W{w+Xf?TvF8j%+G0BfBW& zM%rTEG8k!#y=XAf#3GZ{qp5pw^jypt2BmZd-n%_N;BP!>Od% z`@#~O`|lvuV=qVv_UC!`u8%XS4mw@*<3MA+(Hyj$FXMsdtJ=qSU|Z%7^=Y@9`j`h3 zg>wDe+ZtJ^r1^D&^f=9yOO^4qP>ava*$?X>s`0erlaDhXI`MJhknSP`T~g0(*Cbei zZ4&qDOSmO^RdQoUW#v9QW{uEeLr)Cd=a2f{nR5i)lIycA^FDWBK$(8d^>QCeoR=H- znKLts^_)4@JyabFei0v#&r01-bN(E2W99>U`b&t**~4sR(;j{2AHkmfV&ii5FoW8( zhj|?Jd<1*?%aY64!(DpQ9>(vL?Kzp_zG*S|M(X1SYi9qY2gMIhg-v_NwDvGg2k~<< zuMY1QKmHqXy#9jpx&}7gc#utq&-r1xvbHk2-Si)Q$7*e*{kkr%WGhzebo}zg?-~2V!2|aRX1<$tsvUUt`vmRA zt`eOLcE#YYh_FD0#1yB-Woq&M)#JN85KodanKM)I4k7Kus5HYF&G`i(DnhaIlieIV>N;PapyH)VtD;W2e74No z`a-cznyl>HZZeFH{*5MEWfd3Kzq+3oJE&K$zjWn}^*a7!i~ch|=F!A-lr?Oa>jx@BIjPDk}oQqD0I z$;#tJll@|qmFbyllJXFLO~@5lT&{{4ZVT5Mi=>W=q`fm_$(GCS6@N(!iQ4UY#oi=O zSF5gGb#aNyx7Hojd1bC+-L7Yd`$W7Arg`!8@?@KC@C!LE@)9*|s^e; + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + aliases { + serial0 = &v2m_serial0; + serial1 = &v2m_serial1; + serial2 = &v2m_serial2; + serial3 = &v2m_serial3; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x80000000>, + <0x00000008 0x80000000 0 0x80000000>; + }; + + gic: interrupt-controller@2c001000 { + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0x2c001000 0 0x1000>, + <0x0 0x2c002000 0 0x1000>, + <0x0 0x2c004000 0 0x2000>, + <0x0 0x2c006000 0 0x2000>; + interrupts = <1 9 0xf04>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff01>, + <1 14 0xff01>, + <1 11 0xff01>, + <1 10 0xff01>; + clock-frequency = <100000000>; + }; + + timer@2a810000 { + compatible = "arm,armv7-timer-mem"; + reg = <0x0 0x2a810000 0x0 0x10000>; + clock-frequency = <100000000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + frame@2a820000 { + frame-number = <0>; + interrupts = <0 25 4>; + reg = <0x0 0x2a820000 0x0 0x10000>; + }; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0 60 4>, + <0 61 4>, + <0 62 4>, + <0 63 4>; + }; + + smb { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0 0x08000000 0x04000000>, + <1 0 0 0x14000000 0x04000000>, + <2 0 0 0x18000000 0x04000000>, + <3 0 0 0x1c000000 0x04000000>, + <4 0 0 0x0c000000 0x04000000>, + <5 0 0 0x10000000 0x04000000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 63>; + interrupt-map = <0 0 0 &gic 0 0 4>, + <0 0 1 &gic 0 1 4>, + <0 0 2 &gic 0 2 4>, + <0 0 3 &gic 0 3 4>, + <0 0 4 &gic 0 4 4>, + <0 0 5 &gic 0 5 4>, + <0 0 6 &gic 0 6 4>, + <0 0 7 &gic 0 7 4>, + <0 0 8 &gic 0 8 4>, + <0 0 9 &gic 0 9 4>, + <0 0 10 &gic 0 10 4>, + <0 0 11 &gic 0 11 4>, + <0 0 12 &gic 0 12 4>, + <0 0 13 &gic 0 13 4>, + <0 0 14 &gic 0 14 4>, + <0 0 15 &gic 0 15 4>, + <0 0 16 &gic 0 16 4>, + <0 0 17 &gic 0 17 4>, + <0 0 18 &gic 0 18 4>, + <0 0 19 &gic 0 19 4>, + <0 0 20 &gic 0 20 4>, + <0 0 21 &gic 0 21 4>, + <0 0 22 &gic 0 22 4>, + <0 0 23 &gic 0 23 4>, + <0 0 24 &gic 0 24 4>, + <0 0 25 &gic 0 25 4>, + <0 0 26 &gic 0 26 4>, + <0 0 27 &gic 0 27 4>, + <0 0 28 &gic 0 28 4>, + <0 0 29 &gic 0 29 4>, + <0 0 30 &gic 0 30 4>, + <0 0 31 &gic 0 31 4>, + <0 0 32 &gic 0 32 4>, + <0 0 33 &gic 0 33 4>, + <0 0 34 &gic 0 34 4>, + <0 0 35 &gic 0 35 4>, + <0 0 36 &gic 0 36 4>, + <0 0 37 &gic 0 37 4>, + <0 0 38 &gic 0 38 4>, + <0 0 39 &gic 0 39 4>, + <0 0 40 &gic 0 40 4>, + <0 0 41 &gic 0 41 4>, + <0 0 42 &gic 0 42 4>; + + /include/ "fvp-foundation-motherboard.dtsi" + }; +}; diff --git a/fdts/fvp-foundation-gicv3-psci.dtb b/fdts/fvp-foundation-gicv3-psci.dtb new file mode 100644 index 0000000000000000000000000000000000000000..29a7c742975feb9f239e87529fec1e4824f4eaea GIT binary patch literal 6770 zcmbtZOOGT+5zbod!3O-|X$+Y03=d;mOxyPd;lMi(5kw+dZx7XqN=-R z#uqP-n-56bkvMbU#4lhtBMufPU$`3ygnR|QFEXP#YI=6GGfpWxBjbyVjEstm%F6!R z6aW3EbI&!-xgR?B>@nIGQJ+D58WrW%$H3nub)P>hk#8>iD)%GcKThliZ@#hndfcW# zj{N6PcjBfPEY|gKMvR?xdRjMW+j>FDJ%UObs8joUpl_M}IP|0BxN6f9J moyp?Vb||qC>NzUsc*42=v1NVI(C|yg$375R=Y8+d5B>ph zzu!djbQ0eg>*JI8KMlN_|7Ab_5YLn2)IRayOTQosg%)hqs&nX^d%(C(?Q5Q8pXGhj zXwk$)N?Rs9Tj<08PzZ(c>SOjlkE%YV&%8~)B!uE^;=HU;U39tOf`5Vd;Gur?FG%+t zRO)AW6;)!)LdF|65w3hu-RQjVUOju!J zzasScfC7(tq&$n?z@r{1U&L?Vg~mHDbeNZ<&>?0lN$wxD2|n+praae-IUe~F_@5%f z6f4-x37mYz*jkKhP>i(2xE94oTa2_~q%Fp^DMs32I|d_dG3G8EN7`b16pES00XH{XSO1^&V9*Xr0uxp4My5xUp5$Ni|rbWw8dU97-@^`8H}{W z_6UYilY8DJ*SEvnhbqyH9BJ+7=~O#7r?rE9v199Vky^bhbCW-R6|-1Q5B-2s zeS45&e$l=?M=*cCkIF*axn22<+OxJvkEWx|kxy{u-(IW_y&wm1Jl}Wk_&B5LpwmS^ z4m8#q%|YAsG9LJTRr?qZ?92M0K3V2dAM;?MP_A2hTjNwJAMjnw*Uxm6jt8OdFxchMpMu z(CCtVz%xhC?YM6CW!)Dp1t`<4xz0z};=I6kz?ylo*sPf`c8;oZ!7t(i@>!|-8Lppm zZmqm$Pj}I9J$rbX*|tZY`G>HlyS%ubJv>2e+rx7l^?V3>x(ku(*~2WoZ4cx3#`c`d zai=6-!qhE#y7iQ zbRQ!xNlY`wS=e%)s(m;+MJIk^r={#p*{75KE)TIDY~6feUgEziZRP29+kbqPtkzcA zulw>wwqnOl$1nH3g}djBJaKqsp5V!M+fKCuZI>r#H?m4}(#wj$U+b({X4Typ4+(f< z9Cp_D^)kA5yv(2|vWk<2xW>Cez6`r}1?N6T<@t-gVU6Srg16BskC#=W*Lk9Y19v)T zD3V|aM*Dwt_@>Rd(Qn=4r@uG&A50(Y=+F3(Ig2C#DSGzN_TG5|TsJMUqf1`7-MoM2 z7}N;Y%Q&>*RpE7UwLM)!5g;sMxwrleTI1N;vO1MJW6|Q}_^s2|Q+OdNLJ9sAUCe7N zqN_b#E$7uq8N5h2ejD|5sSro?bulNgh^{7`RaICVc+`d1zM#tsf!(u7-caC)p7}Z} zs(GppmU_0=7lfz?#ja1XIe64{u|7`4xl5{|j+faiPu=Fyu#TIwT)O>uKIfkRL!KR4 zx8G)OrGakKCX4ft^DPea(w~I(&=ok9S96E^JLzu@pI#4;M}P^Ho|VXRe9MBmDg! zS7gI-Rm^Z(xY1a|^{|NBdwrIqTz;?ki&#k1Zr>~RCV9GAE$h{CSmN@nbw_npnJZVf z?-}Ag5pRQOUVO7X*{2))MjjSfiJCOky2_W9AD>>zkMooGtR2FwJo|KCTe=&YY<|@L OUnd++2a8pixc>tP;8ddk literal 0 HcmV?d00001 diff --git a/fdts/fvp-foundation-gicv3-psci.dts b/fdts/fvp-foundation-gicv3-psci.dts new file mode 100644 index 000000000..3243c900e --- /dev/null +++ b/fdts/fvp-foundation-gicv3-psci.dts @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2013, ARM Limited. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of the ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +/memreserve/ 0x80000000 0x00010000; + +/ { +}; + +/ { + model = "FVP Base"; + compatible = "arm,fvp-base", "arm,vexpress"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + aliases { + serial0 = &v2m_serial0; + serial1 = &v2m_serial1; + serial2 = &v2m_serial2; + serial3 = &v2m_serial3; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x80000000>, + <0x00000008 0x80000000 0 0x80000000>; + }; + + gic: interrupt-controller@2cf00000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x0 0x2f000000 0 0x10000>, // GICD + <0x0 0x2f100000 0 0x200000>, // GICR + <0x0 0x2c000000 0 0x2000>, // GICC + <0x0 0x2c010000 0 0x2000>, // GICH + <0x0 0x2c02F000 0 0x2000>; // GICV + interrupts = <1 9 4>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff01>, + <1 14 0xff01>, + <1 11 0xff01>, + <1 10 0xff01>; + clock-frequency = <100000000>; + }; + + timer@2a810000 { + compatible = "arm,armv7-timer-mem"; + reg = <0x0 0x2a810000 0x0 0x10000>; + clock-frequency = <100000000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + frame@2a820000 { + frame-number = <0>; + interrupts = <0 25 4>; + reg = <0x0 0x2a820000 0x0 0x10000>; + }; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <0 60 4>, + <0 61 4>, + <0 62 4>, + <0 63 4>; + }; + + smb { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0 0x08000000 0x04000000>, + <1 0 0 0x14000000 0x04000000>, + <2 0 0 0x18000000 0x04000000>, + <3 0 0 0x1c000000 0x04000000>, + <4 0 0 0x0c000000 0x04000000>, + <5 0 0 0x10000000 0x04000000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 63>; + interrupt-map = <0 0 0 &gic 0 0 4>, + <0 0 1 &gic 0 1 4>, + <0 0 2 &gic 0 2 4>, + <0 0 3 &gic 0 3 4>, + <0 0 4 &gic 0 4 4>, + <0 0 5 &gic 0 5 4>, + <0 0 6 &gic 0 6 4>, + <0 0 7 &gic 0 7 4>, + <0 0 8 &gic 0 8 4>, + <0 0 9 &gic 0 9 4>, + <0 0 10 &gic 0 10 4>, + <0 0 11 &gic 0 11 4>, + <0 0 12 &gic 0 12 4>, + <0 0 13 &gic 0 13 4>, + <0 0 14 &gic 0 14 4>, + <0 0 15 &gic 0 15 4>, + <0 0 16 &gic 0 16 4>, + <0 0 17 &gic 0 17 4>, + <0 0 18 &gic 0 18 4>, + <0 0 19 &gic 0 19 4>, + <0 0 20 &gic 0 20 4>, + <0 0 21 &gic 0 21 4>, + <0 0 22 &gic 0 22 4>, + <0 0 23 &gic 0 23 4>, + <0 0 24 &gic 0 24 4>, + <0 0 25 &gic 0 25 4>, + <0 0 26 &gic 0 26 4>, + <0 0 27 &gic 0 27 4>, + <0 0 28 &gic 0 28 4>, + <0 0 29 &gic 0 29 4>, + <0 0 30 &gic 0 30 4>, + <0 0 31 &gic 0 31 4>, + <0 0 32 &gic 0 32 4>, + <0 0 33 &gic 0 33 4>, + <0 0 34 &gic 0 34 4>, + <0 0 35 &gic 0 35 4>, + <0 0 36 &gic 0 36 4>, + <0 0 37 &gic 0 37 4>, + <0 0 38 &gic 0 38 4>, + <0 0 39 &gic 0 39 4>, + <0 0 40 &gic 0 40 4>, + <0 0 41 &gic 0 41 4>, + <0 0 42 &gic 0 42 4>; + + /include/ "fvp-foundation-motherboard.dtsi" + }; +}; diff --git a/fdts/fvp-foundation-motherboard.dtsi b/fdts/fvp-foundation-motherboard.dtsi new file mode 100644 index 000000000..76cae31f4 --- /dev/null +++ b/fdts/fvp-foundation-motherboard.dtsi @@ -0,0 +1,197 @@ +/* + * Copyright (c) 2013, ARM Limited. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of the ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + + motherboard { + arm,v2m-memory-map = "rs1"; + compatible = "arm,vexpress,v2m-p1", "simple-bus"; + #address-cells = <2>; /* SMB chipselect number and offset */ + #size-cells = <1>; + #interrupt-cells = <1>; + ranges; + + ethernet@2,02000000 { + compatible = "smsc,lan91c111"; + reg = <2 0x02000000 0x10000>; + interrupts = <15>; + }; + + v2m_clk24mhz: clk24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "v2m:clk24mhz"; + }; + + v2m_refclk1mhz: refclk1mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000>; + clock-output-names = "v2m:refclk1mhz"; + }; + + v2m_refclk32khz: refclk32khz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "v2m:refclk32khz"; + }; + + iofpga@3,00000000 { + compatible = "arm,amba-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 3 0 0x200000>; + + v2m_sysreg: sysreg@010000 { + compatible = "arm,vexpress-sysreg"; + reg = <0x010000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + }; + + v2m_sysctl: sysctl@020000 { + compatible = "arm,sp810", "arm,primecell"; + reg = <0x020000 0x1000>; + clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; + clock-names = "refclk", "timclk", "apb_pclk"; + #clock-cells = <1>; + clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; + }; + + v2m_serial0: uart@090000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x090000 0x1000>; + interrupts = <5>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial1: uart@0a0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0a0000 0x1000>; + interrupts = <6>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial2: uart@0b0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0b0000 0x1000>; + interrupts = <7>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial3: uart@0c0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0c0000 0x1000>; + interrupts = <8>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + wdt@0f0000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x0f0000 0x1000>; + interrupts = <0>; + clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; + clock-names = "wdogclk", "apb_pclk"; + }; + + v2m_timer01: timer@110000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x110000 0x1000>; + interrupts = <2>; + clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + v2m_timer23: timer@120000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x120000 0x1000>; + interrupts = <3>; + clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + rtc@170000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x170000 0x1000>; + interrupts = <4>; + clocks = <&v2m_clk24mhz>; + clock-names = "apb_pclk"; + }; + + virtio_block@0130000 { + compatible = "virtio,mmio"; + reg = <0x130000 0x1000>; + interrupts = <0x2a>; + }; + }; + + v2m_fixed_3v3: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + + mcc { + compatible = "arm,vexpress,config-bus", "simple-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + reset@0 { + compatible = "arm,vexpress-reset"; + arm,vexpress-sysreg,func = <5 0>; + }; + + muxfpga@0 { + compatible = "arm,vexpress-muxfpga"; + arm,vexpress-sysreg,func = <7 0>; + }; + + shutdown@0 { + compatible = "arm,vexpress-shutdown"; + arm,vexpress-sysreg,func = <8 0>; + }; + + reboot@0 { + compatible = "arm,vexpress-reboot"; + arm,vexpress-sysreg,func = <9 0>; + }; + + dvimode@0 { + compatible = "arm,vexpress-dvimode"; + arm,vexpress-sysreg,func = <11 0>; + }; + }; + }; -- GitLab