From 44ad5d67cf6006fc53e0248d78a0419a41f0de8d Mon Sep 17 00:00:00 2001 From: Yidi Lin Date: Tue, 15 Dec 2020 15:45:23 +0800 Subject: [PATCH] mediatek: mt8192: Fix non-MISRA compliant code CID 364146: Control flow issues (DEADCODE) Since the value of PSTATE_PWR_LVL_MASK and the value the of PLAT_MAX_PWR_LVL are equal on mt8192, the following equation never hold. if (aff_lvl > PLAT_MAX_PWR_LVL) { return PSCI_E_INVALID_PARAMS; } Remove the deadcode to comply with MISRA standard. Signed-off-by: Yidi Lin Change-Id: I71d0aa826eded8c3b5af961e733167ae40699398 --- plat/mediatek/mt8192/plat_pm.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/plat/mediatek/mt8192/plat_pm.c b/plat/mediatek/mt8192/plat_pm.c index 3ea27b6c1..1fcafeb44 100644 --- a/plat/mediatek/mt8192/plat_pm.c +++ b/plat/mediatek/mt8192/plat_pm.c @@ -297,10 +297,6 @@ static int plat_validate_power_state(unsigned int power_state, unsigned int aff_lvl = psci_get_pstate_pwrlvl(power_state); unsigned int cpu = plat_my_core_pos(); - if (aff_lvl > PLAT_MAX_PWR_LVL) { - return PSCI_E_INVALID_PARAMS; - } - if (pstate == PSTATE_TYPE_STANDBY) { req_state->pwr_domain_state[0] = PLAT_MAX_RET_STATE; } else { -- GitLab