FVP: In BL31/SP_MIN, map only the needed DRAM region statically

Rather than creating entry in plat_arm_mmap array to map the
entire DRAM region in BL31/SP_MIN, only map a smaller region holding
HW_CONFIG DTB. Consequently, an increase in number of sub-translation
tables(level-2 and level-3) i.e., MAX_XLAT_TABLES is necessary to map
the new region in memory.

In order to accommodate the increased code size in BL31 i.e.,
PROGBITS, the max size of BL31 image is increased by 0x1000(4K).

Change-Id: I540b8ee550588e22a3a9fb218183d2ab8061c851
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

plat/arm/board/fvp/fvp_common.c

@@ -135,7 +135,7 @@ const mmap_region_t plat_arm_mmap[] = {
 	ARM_SPM_BUF_EL3_MMAP,
 #endif
 	/* Required by fconf APIs to read HW_CONFIG dtb loaded into DRAM */
-	ARM_MAP_NS_DRAM1,
+	ARM_DTB_DRAM_NS,
 	{0}
 };
 
@@ -163,7 +163,7 @@ const mmap_region_t plat_arm_mmap[] = {
 	MAP_DEVICE0,
 	MAP_DEVICE1,
 	/* Required by fconf APIs to read HW_CONFIG dtb loaded into DRAM */
-	ARM_MAP_NS_DRAM1,
+	ARM_DTB_DRAM_NS,
 	{0}
 };
 #endif

plat/arm/board/fvp/include/platform_def.h

@@ -52,6 +52,13 @@
 #define PLAT_ARM_DRAM2_BASE		ULL(0x880000000)
 #define PLAT_ARM_DRAM2_SIZE		UL(0x80000000)
 
+#define PLAT_HW_CONFIG_DTB_BASE		ULL(0x82000000)
+#define PLAT_HW_CONFIG_DTB_SIZE		ULL(0x8000)
+
+#define ARM_DTB_DRAM_NS			MAP_REGION_FLAT(		\
+					PLAT_HW_CONFIG_DTB_BASE,	\
+					PLAT_HW_CONFIG_DTB_SIZE,	\
+					MT_MEMORY | MT_RO | MT_NS)
 /*
  * Load address of BL33 for this platform port
  */
@@ -70,14 +77,14 @@
 # else
 #  define PLAT_ARM_MMAP_ENTRIES		9
 #  if USE_DEBUGFS
-#   define MAX_XLAT_TABLES		6
+#   define MAX_XLAT_TABLES		8
 #  else
-#   define MAX_XLAT_TABLES		5
+#   define MAX_XLAT_TABLES		7
 #  endif
 # endif
 #elif defined(IMAGE_BL32)
 # define PLAT_ARM_MMAP_ENTRIES		9
-# define MAX_XLAT_TABLES		5
+# define MAX_XLAT_TABLES		6
 #elif !USE_ROMLIB
 # define PLAT_ARM_MMAP_ENTRIES		11
 # define MAX_XLAT_TABLES		5
@@ -126,7 +133,7 @@
  * calculated using the current BL31 PROGBITS debug size plus the sizes of
  * BL2 and BL1-RW
  */
-#define PLAT_ARM_MAX_BL31_SIZE		UL(0x3B000)
+#define PLAT_ARM_MAX_BL31_SIZE		UL(0x3E000)
 #endif /* RESET_TO_BL31 */
 
 #ifndef __aarch64__

plat/arm/board/fvp/platform.mk

@@ -204,9 +204,11 @@ BL31_SOURCES		+=	drivers/arm/fvp/fvp_pwrc.c			\
 
 # Support for fconf in BL31
 # Added separately from the above list for better readability
+ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),)
 BL31_SOURCES		+=	common/fdt_wrappers.c				\
 				lib/fconf/fconf.c				\
 				plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
+endif
 
 ifeq (${FVP_USE_SP804_TIMER},1)
 BL31_SOURCES		+=	drivers/arm/sp804/sp804_delay_timer.c

plat/arm/board/fvp/sp_min/sp_min-fvp.mk

@@ -20,8 +20,10 @@ BL32_SOURCES		+=	drivers/arm/fvp/fvp_pwrc.c			\
 
 # Support for fconf in SP_MIN(BL32)
 # Added separately from the above list for better readability
+ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_SP_MIN}),)
 BL32_SOURCES		+=	common/fdt_wrappers.c				\
 				lib/fconf/fconf.c				\
 				plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
+endif
 
 include plat/arm/common/sp_min/arm_sp_min.mk