From 500fc9e10b3d49a5108d8775c0e47d9666d83c57 Mon Sep 17 00:00:00 2001
From: Varun Wadekar <vwadekar@nvidia.com>
Date: Thu, 3 Jan 2019 10:12:55 -0800
Subject: [PATCH] Tegra: initialise per-CPU GIC interface(s)
This patch initilises the per-CPU GIC bits during cold boot and
secondary CPU power up. Commit 80c50ee accidentally left out this
part.
Change-Id: I73ce59dbc83580a84b827cab89fe7e1f65f9f130
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
---
plat/nvidia/tegra/common/tegra_pm.c | 4 ++--
plat/nvidia/tegra/soc/t132/plat_setup.c | 3 ++-
plat/nvidia/tegra/soc/t186/plat_setup.c | 7 +++----
plat/nvidia/tegra/soc/t210/plat_setup.c | 3 ++-
4 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/plat/nvidia/tegra/common/tegra_pm.c b/plat/nvidia/tegra/common/tegra_pm.c
index 4275cf3f1..e06a116e4 100644
--- a/plat/nvidia/tegra/common/tegra_pm.c
+++ b/plat/nvidia/tegra/common/tegra_pm.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -274,7 +274,7 @@ void tegra_pwr_domain_on_finish(const psci_power_state_t *target_state)
/*
* Initialize the GIC cpu and distributor interfaces
*/
- plat_gic_setup();
+ tegra_gic_init();
/*
* Check if we are exiting from deep sleep.
diff --git a/plat/nvidia/tegra/soc/t132/plat_setup.c b/plat/nvidia/tegra/soc/t132/plat_setup.c
index 3f9cda965..fef5e0a1e 100644
--- a/plat/nvidia/tegra/soc/t132/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t132/plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -101,4 +101,5 @@ uint32_t plat_get_console_from_id(int id)
void plat_gic_setup(void)
{
tegra_gic_setup(NULL, 0);
+ tegra_gic_init();
}
diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c
index c56f71ceb..ef0ba4eb1 100644
--- a/plat/nvidia/tegra/soc/t186/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t186/plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -196,14 +196,13 @@ static const interrupt_prop_t tegra186_interrupt_props[] = {
void plat_gic_setup(void)
{
tegra_gic_setup(tegra186_interrupt_props, ARRAY_SIZE(tegra186_interrupt_props));
+ tegra_gic_init();
/*
* Initialize the FIQ handler only if the platform supports any
* FIQ interrupt sources.
*/
- if (sizeof(tegra186_interrupt_props) > 0U) {
- tegra_fiq_handler_setup();
- }
+ tegra_fiq_handler_setup();
}
/*******************************************************************************
diff --git a/plat/nvidia/tegra/soc/t210/plat_setup.c b/plat/nvidia/tegra/soc/t210/plat_setup.c
index 9fb51690b..4a42644db 100644
--- a/plat/nvidia/tegra/soc/t210/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t210/plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -208,6 +208,7 @@ void plat_late_platform_setup(void)
void plat_gic_setup(void)
{
tegra_gic_setup(tegra210_interrupt_props, ARRAY_SIZE(tegra210_interrupt_props));
+ tegra_gic_init();
/* Enable handling for FIQs */
tegra_fiq_handler_setup();
--
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