Merge changes from topic "intel-plat-refactor" into integration

* changes:
  intel: Platform common code refactor
  intel: Platform common code refactor

plat/intel/soc/stratix10/plat_delay_timer.c

-/*
- * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <assert.h>
-#include <arch_helpers.h>
-#include <drivers/delay_timer.h>
-#include <lib/mmio.h>
-
-#define S10_GLOBAL_TIMER	0xffd01000
-#define S10_GLOBAL_TIMER_EN	0x3
-
-/********************************************************************
- * The timer delay function
- ********************************************************************/
-static uint32_t plat_get_timer_value(void)
-{
-	/*
-	 * Generic delay timer implementation expects the timer to be a down
-	 * counter. We apply bitwise NOT operator to the tick values returned
-	 * by read_cntpct_el0() to simulate the down counter. The value is
-	 * clipped from 64 to 32 bits.
-	 */
-	return (uint32_t)(~read_cntpct_el0());
-}
-
-static const timer_ops_t plat_timer_ops = {
-	.get_timer_value    = plat_get_timer_value,
-	.clk_mult           = 1,
-	.clk_div	    = PLAT_SYS_COUNTER_FREQ_IN_MHZ,
-};
-
-void plat_delay_timer_init(void)
-{
-	timer_init(&plat_timer_ops);
-	mmio_write_32(S10_GLOBAL_TIMER, S10_GLOBAL_TIMER_EN);
-}

plat/intel/soc/stratix10/plat_psci.c

@@ -15,14 +15,13 @@
 #include <lib/psci/psci.h>
 
 #include "platform_def.h"
-#include "platform_private.h"
 #include "s10_reset_manager.h"
 #include "s10_mailbox.h"
 
 #define S10_RSTMGR_OFST			0xffd11000
 #define S10_RSTMGR_MPUMODRST_OFST	0x20
 
-uintptr_t *stratix10_sec_entry = (uintptr_t *) PLAT_S10_SEC_ENTRY;
+uintptr_t *stratix10_sec_entry = (uintptr_t *) PLAT_SEC_ENTRY;
 uintptr_t *cpuid_release = (uintptr_t *) PLAT_CPUID_RELEASE;
 
 /*******************************************************************************

plat/intel/soc/stratix10/plat_storage.c

@@ -21,7 +21,7 @@
 #include <lib/utils.h>
 #include <common/tbbr/tbbr_img_def.h>
 #include "platform_def.h"
-#include "aarch64/stratix10_private.h"
+#include "stratix10_private.h"
 
 #define STRATIX10_FIP_BASE		(0)
 #define STRATIX10_FIP_MAX_SIZE		(0x1000000)

plat/intel/soc/stratix10/plat_topology.c

-/*
- * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <arch.h>
-#include <platform_def.h>
-#include <lib/psci/psci.h>
-static const unsigned char plat_power_domain_tree_desc[] = {1, 4};
-
-/*******************************************************************************
- * This function returns the default topology tree information.
- ******************************************************************************/
-const unsigned char *plat_get_power_domain_tree_desc(void)
-{
-	return plat_power_domain_tree_desc;
-}
-
-/*******************************************************************************
- * This function implements a part of the critical interface between the psci
- * generic layer and the platform that allows the former to query the platform
- * to convert an MPIDR to a unique linear index. An error code (-1) is returned
- * in case the MPIDR is invalid.
- ******************************************************************************/
-int plat_core_pos_by_mpidr(u_register_t mpidr)
-{
-	unsigned int cluster_id, cpu_id;
-
-	mpidr &= MPIDR_AFFINITY_MASK;
-
-	if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK))
-		return -1;
-
-	cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
-	cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
-
-	if (cluster_id >= PLATFORM_CLUSTER_COUNT)
-		return -1;
-
-	/*
-	 * Validate cpu_id by checking whether it represents a CPU in
-	 * one of the two clusters present on the platform.
-	 */
-	if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER)
-		return -1;
-
-	return (cpu_id + (cluster_id * 4));
-}
-

plat/intel/soc/stratix10/platform.mk

@@ -5,9 +5,9 @@
 #
 
 PLAT_INCLUDES		:=	\
-			-Iplat/intel/soc/stratix10/			\
 			-Iplat/intel/soc/stratix10/include/		\
-			-Iplat/intel/soc/common/drivers/
+			-Iplat/intel/soc/common/drivers/		\
+			-Iplat/intel/soc/common/include/
 
 PLAT_BL_COMMON_SOURCES	:=	\
 			lib/xlat_tables/xlat_tables_common.c 		\
@@ -19,8 +19,8 @@ PLAT_BL_COMMON_SOURCES	:=	\
 			drivers/delay_timer/delay_timer.c		\
 			drivers/delay_timer/generic_delay_timer.c  	\
 			drivers/ti/uart/aarch64/16550_console.S		\
-			plat/intel/soc/stratix10/aarch64/platform_common.c \
-			plat/intel/soc/stratix10/aarch64/plat_helpers.S \
+			plat/intel/soc/common/aarch64/platform_common.c \
+			plat/intel/soc/common/aarch64/plat_helpers.S
 
 BL2_SOURCES     +=	\
 		drivers/partition/partition.c				\
@@ -35,15 +35,15 @@ BL2_SOURCES     +=	\
 		drivers/intel/soc/stratix10/io/s10_memmap_qspi.c	\
 		plat/intel/soc/stratix10/bl2_plat_setup.c		\
 		plat/intel/soc/stratix10/plat_storage.c			\
-                plat/intel/soc/stratix10/bl2_plat_mem_params_desc.c	\
+                plat/intel/soc/common/bl2_plat_mem_params_desc.c	\
 		plat/intel/soc/stratix10/soc/s10_reset_manager.c	\
 		plat/intel/soc/stratix10/soc/s10_handoff.c		\
 		plat/intel/soc/stratix10/soc/s10_clock_manager.c	\
 		plat/intel/soc/stratix10/soc/s10_pinmux.c		\
 		plat/intel/soc/stratix10/soc/s10_memory_controller.c	\
-		plat/intel/soc/stratix10/plat_delay_timer.c		\
+		plat/intel/soc/common/socfpga_delay_timer.c		\
 		lib/cpus/aarch64/cortex_a53.S				\
-		plat/intel/soc/stratix10/stratix10_image_load.c		\
+		plat/intel/soc/common/socfpga_image_load.c		\
 		plat/intel/soc/stratix10/soc/s10_system_manager.c	\
 		common/desc_image_load.c				\
 		plat/intel/soc/stratix10/soc/s10_mailbox.c		\
@@ -58,13 +58,13 @@ BL31_SOURCES	+=	drivers/arm/cci/cci.c				\
 			plat/intel/soc/stratix10/plat_sip_svc.c		\
 			plat/intel/soc/stratix10/bl31_plat_setup.c 	\
 			plat/intel/soc/stratix10/plat_psci.c		\
-			plat/intel/soc/stratix10/plat_topology.c	\
-			plat/intel/soc/stratix10/plat_delay_timer.c	\
+			plat/intel/soc/common/socfpga_topology.c	\
+			plat/intel/soc/common/socfpga_delay_timer.c	\
 			plat/intel/soc/stratix10/soc/s10_reset_manager.c\
 			plat/intel/soc/stratix10/soc/s10_pinmux.c	\
 			plat/intel/soc/stratix10/soc/s10_clock_manager.c\
 			plat/intel/soc/stratix10/soc/s10_handoff.c	\
-			plat/intel/soc/stratix10/soc/s10_mailbox.c	\
+			plat/intel/soc/stratix10/soc/s10_mailbox.c
 
 PROGRAMMABLE_RESET_ADDRESS	:= 0
 BL2_AT_EL3			:= 1

plat/intel/soc/stratix10/soc/s10_clock_manager.c

@@ -10,7 +10,6 @@
 #include <drivers/delay_timer.h>
 #include <lib/mmio.h>
 #include <platform_def.h>
-#include <platform_private.h>
 
 #include "s10_clock_manager.h"
 #include "s10_handoff.h"

plat/intel/soc/stratix10/soc/s10_handoff.c

@@ -13,7 +13,6 @@
 #include <string.h>
 #include <plat/common/platform.h>
 #include <platform_def.h>
-#include <platform_private.h>
 
 #include "s10_handoff.h"
 

plat/intel/soc/stratix10/soc/s10_reset_manager.c

@@ -14,7 +14,6 @@
 #include <lib/mmio.h>
 #include <plat/common/platform.h>
 #include <platform_def.h>
-#include <platform_private.h>
 #include "s10_reset_manager.h"
 
 void deassert_peripheral_reset(void)

plat/intel/soc/stratix10/stratix10_image_load.c

-/*
- * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <common/desc_image_load.h>
-
-/*******************************************************************************
- * This function flushes the data structures so that they are visible
- * in memory for the next BL image.
- ******************************************************************************/
-void plat_flush_next_bl_params(void)
-{
-	flush_bl_params_desc();
-}
-
-/*******************************************************************************
- * This function returns the list of loadable images.
- ******************************************************************************/
-bl_load_info_t *plat_get_bl_image_load_info(void)
-{
-	return get_bl_load_info_from_mem_params_desc();
-}
-
-/*******************************************************************************
- * This function returns the list of executable images.
- ******************************************************************************/
-bl_params_t *plat_get_next_bl_params(void)
-{
-	return get_next_bl_params_from_mem_params_desc();
-}