From 53677b935a203706e7157ba2b3b80c9a7c61cf5a Mon Sep 17 00:00:00 2001
From: Jon Medhurst <tixy@linaro.org>
Date: Wed, 19 Feb 2014 11:29:32 +0000
Subject: [PATCH] Workaround: Setup register context for BL3-3
This is a temporary solution for issue #20
Signed-off-by: Jon Medhurst <tixy@linaro.org>
---
bl31/bl31_main.c | 8 ++++++++
plat/juno/bl31_plat_setup.c | 3 +++
plat/juno/platform.h | 2 +-
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c
index f79a1220f..19eccd5d8 100644
--- a/bl31/bl31_main.c
+++ b/bl31/bl31_main.c
@@ -182,6 +182,14 @@ void bl31_prepare_next_image_entry()
(MODE_RW_64 << MODE_RW_SHIFT))
scr |= SCR_RW_BIT;
+ /*
+ * Setup general purpose registers context for next image.
+ */
+ cpu_context *context = cm_get_context(read_mpidr(),
+ next_image_info->security_state);
+ memcpy(&context->gpregs_ctx, &next_image_info->args,
+ sizeof(next_image_info->args));
+
/*
* Tell the context mgmt. library to ensure that SP_EL3 points to
* the right context to exit from EL3 correctly.
diff --git a/plat/juno/bl31_plat_setup.c b/plat/juno/bl31_plat_setup.c
index 19f2085d8..620c0133e 100644
--- a/plat/juno/bl31_plat_setup.c
+++ b/plat/juno/bl31_plat_setup.c
@@ -108,6 +108,9 @@ void bl31_early_platform_setup(bl31_args *from_bl2,
void *data)
{
bl2_to_bl31_args = *from_bl2;
+
+ /* UEFI expects x0 to be primary CPU MPID */
+ bl2_to_bl31_args.bl33_image_info.args.arg0 = PRIMARY_CPU;
}
/*******************************************************************************
diff --git a/plat/juno/platform.h b/plat/juno/platform.h
index c85b270a9..e6f8a4179 100644
--- a/plat/juno/platform.h
+++ b/plat/juno/platform.h
@@ -62,7 +62,7 @@
/* Non-Trusted Firmware BL3-3 and its load address */
#define BL33_IMAGE_NAME "bl33.bin" /* e.g. UEFI */
-#define NS_IMAGE_OFFSET (DRAM_BASE + 0x8000000) /* DRAM + 128MB */
+#define NS_IMAGE_OFFSET 0xE0000000
/* Firmware Image Package */
#define FIP_IMAGE_NAME "fip.bin"
--
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