Commit 5b33ad17 authored by Deepika Bhavnani's avatar Deepika Bhavnani
Browse files

Unify type of "cpu_idx" across PSCI module.



NOTE for platform integrators:
   API `plat_psci_stat_get_residency()` third argument
   `last_cpu_idx` is changed from "signed int" to the
   "unsigned int" type.

Issue / Trouble points
1. cpu_idx is used as mix of `unsigned int` and `signed int` in code
with typecasting at some places leading to coverity issues.

2. Underlying platform API's return cpu_idx as `unsigned int`
and comparison is performed with platform specific defines
`PLAFORM_xxx` which is not consistent

Misra Rule 10.4:
The value of a complex expression of integer type may only be cast to
a type that is narrower and of the same signedness as the underlying
type of the expression.

Based on above points, cpu_idx is kept as `unsigned int` to match
the API's and low-level functions and platform defines are updated
where ever required
Signed-off-by: default avatarDeepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: Ib26fd16e420c35527204b126b9b91e8babcc3a5c
parent 22d12c41
...@@ -11,9 +11,9 @@ ...@@ -11,9 +11,9 @@
#include <sgi_base_platform_def.h> #include <sgi_base_platform_def.h>
#define PLAT_ARM_CLUSTER_COUNT 2 #define PLAT_ARM_CLUSTER_COUNT U(2)
#define CSS_SGI_MAX_CPUS_PER_CLUSTER 4 #define CSS_SGI_MAX_CPUS_PER_CLUSTER U(4)
#define CSS_SGI_MAX_PE_PER_CPU 1 #define CSS_SGI_MAX_PE_PER_CPU U(1)
#define PLAT_CSS_MHU_BASE UL(0x45400000) #define PLAT_CSS_MHU_BASE UL(0x45400000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE #define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
......
/* /*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -11,9 +11,9 @@ ...@@ -11,9 +11,9 @@
#include <sgi_base_platform_def.h> #include <sgi_base_platform_def.h>
#define PLAT_ARM_CLUSTER_COUNT 2 #define PLAT_ARM_CLUSTER_COUNT U(2)
#define CSS_SGI_MAX_CPUS_PER_CLUSTER 4 #define CSS_SGI_MAX_CPUS_PER_CLUSTER U(4)
#define CSS_SGI_MAX_PE_PER_CPU 1 #define CSS_SGI_MAX_PE_PER_CPU U(1)
#define PLAT_CSS_MHU_BASE UL(0x45000000) #define PLAT_CSS_MHU_BASE UL(0x45000000)
#define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE #define PLAT_MHUV2_BASE PLAT_CSS_MHU_BASE
......
/* /*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -9,8 +9,8 @@ ...@@ -9,8 +9,8 @@
#include <sgm_base_platform_def.h> #include <sgm_base_platform_def.h>
#define PLAT_MAX_CPUS_PER_CLUSTER 8 #define PLAT_MAX_CPUS_PER_CLUSTER U(8)
#define PLAT_MAX_PE_PER_CPU 1 #define PLAT_MAX_PE_PER_CPU U(1)
/* /*
* Physical and virtual address space limits for MMU in AARCH64 & AARCH32 modes * Physical and virtual address space limits for MMU in AARCH64 & AARCH32 modes
......
/* /*
* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -17,8 +17,8 @@ ...@@ -17,8 +17,8 @@
#include <plat/common/common_def.h> #include <plat/common/common_def.h>
/* CPU topology */ /* CPU topology */
#define PLAT_ARM_CLUSTER_COUNT 1 #define PLAT_ARM_CLUSTER_COUNT U(1)
#define PLAT_ARM_CLUSTER_CORE_COUNT 8 #define PLAT_ARM_CLUSTER_CORE_COUNT U(8)
#define PLATFORM_CORE_COUNT PLAT_ARM_CLUSTER_CORE_COUNT #define PLATFORM_CORE_COUNT PLAT_ARM_CLUSTER_CORE_COUNT
#define PLAT_MAX_PWR_LVL ARM_PWR_LVL2 #define PLAT_MAX_PWR_LVL ARM_PWR_LVL2
......
/* /*
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -92,7 +92,7 @@ void plat_psci_stat_accounting_stop( ...@@ -92,7 +92,7 @@ void plat_psci_stat_accounting_stop(
*/ */
u_register_t plat_psci_stat_get_residency(unsigned int lvl, u_register_t plat_psci_stat_get_residency(unsigned int lvl,
const psci_power_state_t *state_info, const psci_power_state_t *state_info,
int last_cpu_idx) unsigned int last_cpu_idx)
{ {
plat_local_state_t state; plat_local_state_t state;
unsigned long long pwrup_ts = 0, pwrdn_ts = 0; unsigned long long pwrup_ts = 0, pwrdn_ts = 0;
...@@ -103,7 +103,7 @@ u_register_t plat_psci_stat_get_residency(unsigned int lvl, ...@@ -103,7 +103,7 @@ u_register_t plat_psci_stat_get_residency(unsigned int lvl,
assert(last_cpu_idx <= PLATFORM_CORE_COUNT); assert(last_cpu_idx <= PLATFORM_CORE_COUNT);
if (lvl == PSCI_CPU_PWR_LVL) if (lvl == PSCI_CPU_PWR_LVL)
assert((unsigned int)last_cpu_idx == plat_my_core_pos()); assert(last_cpu_idx == plat_my_core_pos());
/* /*
* If power down is requested, then timestamp capture will * If power down is requested, then timestamp capture will
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment