Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703

Neoverse N1 erratum 1315703 is a Cat A (rare) erratum [1], present in
older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined CPUACTLR2_EL1
system register, which will disable the load-bypass-store feature.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdocpjdoc-466751330-1032/index.html



Change-Id: I5c708dbe0efa4daa0bcb6bd9622c5efe19c03af9
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

docs/design/cpu-specific-build-macros.rst

@@ -226,6 +226,9 @@ For Cortex-A76, the following errata build flags are defined :
 -  ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76
    CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
 
+-  ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1
+   CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
+
 DSU Errata Workarounds
 ----------------------
 

include/lib/cpus/aarch64/neoverse_n1.h

@@ -36,6 +36,7 @@
 #define NEOVERSE_N1_CPUACTLR2_EL1	S3_0_C15_C1_1
 
 #define NEOVERSE_N1_CPUACTLR2_EL1_BIT_2		(ULL(1) << 2)
+#define NEOVERSE_N1_CPUACTLR2_EL1_BIT_16	(ULL(1) << 16)
 
 /* Instruction patching registers */
 #define CPUPSELR_EL3	S3_6_C15_C8_0

lib/cpus/aarch64/neoverse_n1.S

@@ -16,7 +16,7 @@
 #endif
 
 /* --------------------------------------------------
- * Errata Workaround for Neoverse N1 Errata
+ * Errata Workaround for Neoverse N1 Erratum 1043202.
  * This applies to revision r0p0 and r1p0 of Neoverse N1.
  * Inputs:
  * x0: variant[4:7] and revision[0:3] of current cpu.
@@ -70,6 +70,35 @@ func neoverse_n1_disable_speculative_loads
 	ret
 endfunc neoverse_n1_disable_speculative_loads
 
+/* --------------------------------------------------
+ * Errata Workaround for Neoverse N1 Erratum 1315703.
+ * This applies to revision <= r3p0 of Neoverse N1.
+ * Inputs:
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0-x17
+ * --------------------------------------------------
+ */
+func errata_n1_1315703_wa
+	/* Compare x0 against revision r3p1 */
+	mov	x17, x30
+	bl	check_errata_1315703
+	cbz	x0, 1f
+
+	mrs	x0, NEOVERSE_N1_CPUACTLR2_EL1
+	orr	x0, x0, #NEOVERSE_N1_CPUACTLR2_EL1_BIT_16
+	msr	NEOVERSE_N1_CPUACTLR2_EL1, x0
+	isb
+
+1:
+	ret	x17
+endfunc errata_n1_1315703_wa
+
+func check_errata_1315703
+	/* Applies to everything <= r3p0. */
+	mov	x1, #0x30
+	b	cpu_rev_var_ls
+endfunc check_errata_1315703
+
 func neoverse_n1_reset_func
 	mov	x19, x30
 
@@ -89,6 +118,11 @@ func neoverse_n1_reset_func
 	bl	errata_n1_1043202_wa
 #endif
 
+#if ERRATA_N1_1315703
+	mov	x0, x18
+	bl	errata_n1_1315703_wa
+#endif
+
 #if ENABLE_AMU
 	/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
 	mrs	x0, actlr_el3
@@ -141,6 +175,7 @@ func neoverse_n1_errata_report
 	 * checking functions of each errata.
 	 */
 	report_errata ERRATA_N1_1043202, neoverse_n1, 1043202
+	report_errata ERRATA_N1_1315703, neoverse_n1, 1315703
 
 	ldp	x8, x30, [sp], #16
 	ret

lib/cpus/cpu-ops.mk

@@ -238,6 +238,10 @@ ERRATA_A76_1286807	?=0
 # only to r0p0 and r1p0 of the Neoverse N1 cpu.
 ERRATA_N1_1043202	?=1
 
+# Flag to apply erratum 1315703 workaround during reset. This erratum applies
+# to revisions before r3p1 of the Neoverse N1 cpu.
+ERRATA_N1_1315703	?=1
+
 # Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
 # Applying the workaround results in higher DSU power consumption on idle.
 ERRATA_DSU_798953	?=0
@@ -427,6 +431,10 @@ $(eval $(call add_define,ERRATA_A76_1286807))
 $(eval $(call assert_boolean,ERRATA_N1_1043202))
 $(eval $(call add_define,ERRATA_N1_1043202))
 
+# Process ERRATA_N1_1315703 flag
+$(eval $(call assert_boolean,ERRATA_N1_1315703))
+$(eval $(call add_define,ERRATA_N1_1315703))
+
 # Process ERRATA_DSU_798953 flag
 $(eval $(call assert_boolean,ERRATA_DSU_798953))
 $(eval $(call add_define,ERRATA_DSU_798953))