Unverified Commit 601abdba authored by davidcunado-arm's avatar davidcunado-arm Committed by GitHub
Browse files

Merge pull request #1271 from afaerber/tegra-fixes

tegra: Fix mmap_region_t struct mismatch
parents 15047150 28db3e96
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
#include <arch.h> #include <arch.h>
#include <platform_def.h> #include <platform_def.h>
#include <psci.h> #include <psci.h>
#include <xlat_tables.h> #include <xlat_tables_v2.h>
/******************************************************************************* /*******************************************************************************
* Tegra DRAM memory base address * Tegra DRAM memory base address
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
#include <bl_common.h> #include <bl_common.h>
#include <tegra_def.h> #include <tegra_def.h>
#include <tegra_private.h> #include <tegra_private.h>
#include <xlat_tables.h> #include <xlat_tables_v2.h>
/******************************************************************************* /*******************************************************************************
* The Tegra power domain tree has a single system level power domain i.e. a * The Tegra power domain tree has a single system level power domain i.e. a
......
...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
#include <tegra_def.h> #include <tegra_def.h>
#include <tegra_platform.h> #include <tegra_platform.h>
#include <tegra_private.h> #include <tegra_private.h>
#include <xlat_tables.h> #include <xlat_tables_v2.h>
DEFINE_RENAME_SYSREG_RW_FUNCS(l2ctlr_el1, CORTEX_A57_L2CTLR_EL1) DEFINE_RENAME_SYSREG_RW_FUNCS(l2ctlr_el1, CORTEX_A57_L2CTLR_EL1)
extern uint64_t tegra_enable_l2_ecc_parity_prot; extern uint64_t tegra_enable_l2_ecc_parity_prot;
......
...@@ -9,7 +9,7 @@ ...@@ -9,7 +9,7 @@
#include <console.h> #include <console.h>
#include <tegra_def.h> #include <tegra_def.h>
#include <tegra_private.h> #include <tegra_private.h>
#include <xlat_tables.h> #include <xlat_tables_v2.h>
/******************************************************************************* /*******************************************************************************
* The Tegra power domain tree has a single system level power domain i.e. a * The Tegra power domain tree has a single system level power domain i.e. a
......
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