diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
index bd1865d07c69ea77c809ba292d2951b3d5ea9d46..2001ad91800d8939b6c6077936a3a8bf05b85f05 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
@@ -235,19 +235,16 @@ void qos_init_h3_v11(void)
 	io_write_32(0xFFC51800, 0x00000001U);
 
 	/* CCI bus Leaf setting */
-	{
+	uint32_t modemr = io_read_32(RCAR_MODEMR);
 
-		uint32_t modemr = io_read_32(RCAR_MODEMR);
+	modemr &= MODEMR_BOOT_CPU_MASK;
 
-		modemr &= MODEMR_BOOT_CPU_MASK;
-
-		if ((modemr == MODEMR_BOOT_CPU_CA57) ||
-		    (modemr == MODEMR_BOOT_CPU_CA53)) {
-			io_write_32(0xF1300800, 0x00000001U);
-			io_write_32(0xF1340800, 0x00000001U);
-			io_write_32(0xF1380800, 0x00000001U);
-			io_write_32(0xF13C0800, 0x00000001U);
-		}
+	if ((modemr == MODEMR_BOOT_CPU_CA57) ||
+	    (modemr == MODEMR_BOOT_CPU_CA53)) {
+		io_write_32(0xF1300800, 0x00000001U);
+		io_write_32(0xF1340800, 0x00000001U);
+		io_write_32(0xF1380800, 0x00000001U);
+		io_write_32(0xF13C0800, 0x00000001U);
 	}
 
 	/* Resource Alloc start */
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
index 7592caa5ae6914f7567ecc5579b8376b43df46e7..2f9c219ca4e2f36bf5688fb6d108c368e4fbb2e3 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
@@ -187,30 +187,28 @@ void qos_init_h3_v20(void)
 	io_write_32(QOSCTRL_REF_ARS, 0x00330000U);
 #endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
 
-	{
-		uint32_t i;
-
-		for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
-			io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
-			io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
-		}
-		for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
-			io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
-			io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
-		}
+	uint32_t i;
+
+	for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+		io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+		io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
+	}
+	for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+		io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+		io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
+	}
 #if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
-		for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
-			io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
-				    qoswt_fix[i]);
-			io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
-				    qoswt_fix[i]);
-		}
-		for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
-			io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
-			io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
-		}
-#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
+	for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
+		io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
+			    qoswt_fix[i]);
+		io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
+			    qoswt_fix[i]);
+	}
+	for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
+		io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
+		io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
 	}
+#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
 
 	/* 3DG bus Leaf setting */
 	io_write_32(GPU_ACT0, 0x00000000U);
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
index 1261a43089991a7803ccc3d5e024c1276c869ab7..c71e0e749408159272e713dcd85e6638053a77ab 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
@@ -194,30 +194,28 @@ void qos_init_h3_v30(void)
 	io_write_32(QOSCTRL_REF_ARS,
 		    ((QOSCTRL_REF_ARS_ARBSTOPCYCLE_H3_30 << 16)));
 
-	{
-		uint32_t i;
-
-		for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
-			io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
-			io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
-		}
-		for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
-			io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
-			io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
-		}
+	uint32_t i;
+
+	for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+		io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+		io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
+	}
+	for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+		io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+		io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
+	}
 #if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
-		for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
-			io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
-				    qoswt_fix[i]);
-			io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
-				    qoswt_fix[i]);
-		}
-		for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
-			io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
-			io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
-		}
-#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
+	for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
+		io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
+			    qoswt_fix[i]);
+		io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
+			    qoswt_fix[i]);
+	}
+	for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
+		io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
+		io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
 	}
+#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
 
 	/* AXI setting */
 	io_write_32(AXI_MMCR, 0x00010008U);
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
index 0557b795084baf64776d6293f9051dbca5733edb..906d158fc02a1b59d823af9b220e383cd623e1f3 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
@@ -188,30 +188,28 @@ void qos_init_h3n_v30(void)
 	io_write_32(QOSCTRL_REF_ARS,
 		    ((QOSCTRL_REF_ARS_ARBSTOPCYCLE_H3N << 16)));
 
-	{
-		uint32_t i;
-
-		for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
-			io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
-			io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
-		}
-		for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
-			io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
-			io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
-		}
+	uint32_t i;
+
+	for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+		io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+		io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
+	}
+	for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+		io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+		io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
+	}
 #if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
-		for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
-			io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
-				    qoswt_fix[i]);
-			io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
-				    qoswt_fix[i]);
-		}
-		for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
-			io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
-			io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
-		}
-#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
+	for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
+		io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
+			    qoswt_fix[i]);
+		io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
+			    qoswt_fix[i]);
+	}
+	for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
+		io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
+		io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
 	}
+#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
 
 	/* AXI setting */
 	io_write_32(AXI_MMCR, 0x00010008U);