diff --git a/docs/plat/rpi3.rst b/docs/plat/rpi3.rst index 5ac908539fd244bf079800056fc11eb9c7f9135c..0ba564d81297c741c589ca669c0a2015a9ac2626 100644 --- a/docs/plat/rpi3.rst +++ b/docs/plat/rpi3.rst @@ -196,29 +196,19 @@ Then compile TF-A. For a AArch32 kernel, use the following command line: CROSS_COMPILE=aarch64-linux-gnu- make PLAT=rpi3 \ RPI3_BL33_IN_AARCH32=1 \ - BL33=../rpi3-arm-tf-bootstrap/aarch32/el2-bootstrap.bin \ - all fip + BL33=../rpi3-arm-tf-bootstrap/aarch32/el2-bootstrap.bin For a AArch64 kernel, use this other command line: .. code:: shell CROSS_COMPILE=aarch64-linux-gnu- make PLAT=rpi3 \ - BL33=../rpi3-arm-tf-bootstrap/aarch64/el2-bootstrap.bin \ - all fip + BL33=../rpi3-arm-tf-bootstrap/aarch64/el2-bootstrap.bin -Then, join BL1 and the FIP with the following instructions (replace ``release`` -by ``debug`` if you set the build option ``DEBUG=1``): - -.. code:: shell - - cp build/rpi3/release/bl1.bin bl1.pad.bin - truncate --size=131072 bl1.pad.bin - cat bl1.pad.bin build/rpi3/release/fip.bin > armstub8.bin - -The resulting file, ``armstub8.bin``, contains BL1 and the FIP in the place they -need to be for TF-A to boot correctly. Now, follow the instructions in -`Setup SD card`_. +The build system concatenates BL1 and the FIP so that the addresses match the +ones in the memory map. The resulting file is ``armstub8.bin``, located in the +build folder (e.g. ``build/rpi3/debug/armstub8.bin``). Now, follow the +instructions in `Setup SD card`_. The following build options are supported: diff --git a/plat/rpi3/platform.mk b/plat/rpi3/platform.mk index df19705e68cf12b7bc1b93932f90d21388cbed18..fa7e5eb7f6d1c502ba76af8ab3005dff7ccaf75b 100644 --- a/plat/rpi3/platform.mk +++ b/plat/rpi3/platform.mk @@ -54,6 +54,26 @@ else TF_CFLAGS_aarch64 += -mtune=cortex-a53 endif +# Platform Makefile target +# ------------------------ + +RPI3_BL1_PAD_BIN := ${BUILD_PLAT}/bl1_pad.bin +RPI3_ARMSTUB8_BIN := ${BUILD_PLAT}/armstub8.bin + +# Add new default target when compiling this platform +all: armstub + +# This target concatenates BL1 and the FIP so that the base addresses match the +# ones defined in the memory map +armstub: bl1 fip + @echo " CAT $@" + ${Q}cp ${BUILD_PLAT}/bl1.bin ${RPI3_BL1_PAD_BIN} + ${Q}truncate --size=131072 ${RPI3_BL1_PAD_BIN} + ${Q}cat ${RPI3_BL1_PAD_BIN} ${BUILD_PLAT}/fip.bin > ${RPI3_ARMSTUB8_BIN} + @${ECHO_BLANK_LINE} + @echo "Built $@ successfully" + @${ECHO_BLANK_LINE} + # Build config flags # ------------------