Merge changes I8ca411d5,Ib5f5dd81,I0488e22c into integration

* changes:
  plat: imx: imx8qm: apply clk/pinmux configuration for DEBUG_CONSOLE
  plat: imx: imx8qm: provide debug uart num as build param
  plat: imx: imx8_iomux: fix shift-overflow errors

plat/imx/common/include/imx8_iomux.h

@@ -7,19 +7,19 @@
 #ifndef IMX8_IOMUX_H
 #define IMX8_IOMUX_H
 
-#define PADRING_IFMUX_EN_SHIFT		31
-#define PADRING_IFMUX_EN_MASK		(1 << PADRING_IFMUX_EN_SHIFT)
-#define PADRING_GP_EN_SHIFT		30
-#define PADRING_GP_EN_MASK		(1 << PADRING_GP_EN_SHIFT)
-#define PADRING_IFMUX_SHIFT		27
-#define PADRING_IFMUX_MASK		(0x7 << PADRING_IFMUX_SHIFT)
-#define PADRING_CONFIG_SHIFT		25
-#define PADRING_CONFIG_MASK		(0x3 << PADRING_CONFIG_SHIFT)
-#define PADRING_LPCONFIG_SHIFT		23
-#define PADRING_LPCONFIG_MASK		(0x3 << PADRING_LPCONFIG_SHIFT)
-#define PADRING_PULL_SHIFT		5
-#define PADRING_PULL_MASK		(0x3 << PADRING_PULL_SHIFT)
-#define PADRING_DSE_SHIFT		0
-#define PADRING_DSE_MASK		(0x7 << PADRING_DSE_SHIFT)
+#define PADRING_IFMUX_EN_SHIFT		U(31)
+#define PADRING_IFMUX_EN_MASK		(U(0x1) << PADRING_IFMUX_EN_SHIFT)
+#define PADRING_GP_EN_SHIFT		U(30)
+#define PADRING_GP_EN_MASK		(U(0x1) << PADRING_GP_EN_SHIFT)
+#define PADRING_IFMUX_SHIFT		U(27)
+#define PADRING_IFMUX_MASK		(U(0x7) << PADRING_IFMUX_SHIFT)
+#define PADRING_CONFIG_SHIFT		U(25)
+#define PADRING_CONFIG_MASK		(U(0x3) << PADRING_CONFIG_SHIFT)
+#define PADRING_LPCONFIG_SHIFT		U(23)
+#define PADRING_LPCONFIG_MASK		(U(0x3) << PADRING_LPCONFIG_SHIFT)
+#define PADRING_PULL_SHIFT		U(5)
+#define PADRING_PULL_MASK		(U(0x3) << PADRING_PULL_SHIFT)
+#define PADRING_DSE_SHIFT		U(0)
+#define PADRING_DSE_MASK		(U(0x7) << PADRING_DSE_SHIFT)
 
 #endif /* IMX8_IOMUX_H */

plat/imx/imx8qm/imx8qm_bl31_setup.c

@@ -44,6 +44,22 @@ static entry_point_info_t bl33_image_ep_info;
 			(SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | \
 			(SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT))
 
+#if defined(IMX_USE_UART0)
+#define IMX_RES_UART			SC_R_UART_0
+#define IMX_PAD_UART_RX			SC_P_UART0_RX
+#define IMX_PAD_UART_TX			SC_P_UART0_TX
+#define IMX_PAD_UART_RTS_B		SC_P_UART0_RTS_B
+#define IMX_PAD_UART_CTS_B		SC_P_UART0_CTS_B
+#elif defined(IMX_USE_UART1)
+#define IMX_RES_UART			SC_R_UART_1
+#define IMX_PAD_UART_RX			SC_P_UART1_RX
+#define IMX_PAD_UART_TX			SC_P_UART1_TX
+#define IMX_PAD_UART_RTS_B		SC_P_UART1_RTS_B
+#define IMX_PAD_UART_CTS_B		SC_P_UART1_CTS_B
+#else
+#error "Provide proper UART number in IMX_DEBUG_UART"
+#endif
+
 const static int imx8qm_cci_map[] = {
 	CLUSTER0_CCI_SLVAE_IFACE,
 	CLUSTER1_CCI_SLVAE_IFACE
@@ -79,7 +95,7 @@ static void lpuart32_serial_setbrg(unsigned int base, int baudrate)
 	if (baudrate == 0)
 		panic();
 
-	sc_pm_get_clock_rate(ipc_handle, SC_R_UART_0, 2, &rate);
+	sc_pm_get_clock_rate(ipc_handle, IMX_RES_UART, 2, &rate);
 
 	baud_diff = baudrate;
 	osr = 0;
@@ -301,16 +317,17 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 		panic();
 
 #if DEBUG_CONSOLE_A53
-	sc_pm_set_resource_power_mode(ipc_handle, SC_R_UART_0, SC_PM_PW_MODE_ON);
+	sc_pm_set_resource_power_mode(ipc_handle, IMX_RES_UART,
+				      SC_PM_PW_MODE_ON);
 	sc_pm_clock_rate_t rate = 80000000;
-	sc_pm_set_clock_rate(ipc_handle, SC_R_UART_0, 2, &rate);
-	sc_pm_clock_enable(ipc_handle, SC_R_UART_0, 2, true, false);
+	sc_pm_set_clock_rate(ipc_handle, IMX_RES_UART, 2, &rate);
+	sc_pm_clock_enable(ipc_handle, IMX_RES_UART, 2, true, false);
 
 	/* configure UART pads */
-	sc_pad_set(ipc_handle, SC_P_UART0_RX, UART_PAD_CTRL);
-	sc_pad_set(ipc_handle, SC_P_UART0_TX, UART_PAD_CTRL);
-	sc_pad_set(ipc_handle, SC_P_UART0_RTS_B, UART_PAD_CTRL);
-	sc_pad_set(ipc_handle, SC_P_UART0_CTS_B, UART_PAD_CTRL);
+	sc_pad_set(ipc_handle, IMX_PAD_UART_RX, UART_PAD_CTRL);
+	sc_pad_set(ipc_handle, IMX_PAD_UART_TX, UART_PAD_CTRL);
+	sc_pad_set(ipc_handle, IMX_PAD_UART_RTS_B, UART_PAD_CTRL);
+	sc_pad_set(ipc_handle, IMX_PAD_UART_CTS_B, UART_PAD_CTRL);
 	lpuart32_serial_init(IMX_BOOT_UART_BASE);
 #endif
 

plat/imx/imx8qm/include/platform_def.h

@@ -40,12 +40,22 @@
 #define PLAT_CCI_BASE			0x52090000
 #define CLUSTER0_CCI_SLVAE_IFACE	3
 #define CLUSTER1_CCI_SLVAE_IFACE	4
+
+/* UART */
+#if defined(IMX_USE_UART0)
 #define IMX_BOOT_UART_BASE		0x5a060000
+#elif defined(IMX_USE_UART1)
+#define IMX_BOOT_UART_BASE		0x5a070000
+#else
+#error "Provide proper UART number in IMX_DEBUG_UART"
+#endif
+
 #define IMX_BOOT_UART_BAUDRATE		115200
 #define IMX_BOOT_UART_CLK_IN_HZ		24000000
 #define PLAT_CRASH_UART_BASE		IMX_BOOT_UART_BASE
 #define PLAT__CRASH_UART_CLK_IN_HZ	24000000
 #define IMX_CONSOLE_BAUDRATE		115200
+
 #define SC_IPC_BASE			0x5d1b0000
 #define IMX_GPT_LPCG_BASE		0x5d540000
 #define IMX_GPT_BASE			0x5d140000
@@ -64,7 +74,6 @@
 #define MAX_XLAT_TABLES			8
 #define MAX_MMAP_REGIONS		12
 
-#define DEBUG_CONSOLE			0
-#define DEBUG_CONSOLE_A53		0
+#define DEBUG_CONSOLE_A53		DEBUG_CONSOLE
 
 #endif /* PLATFORM_DEF_H */

plat/imx/imx8qm/platform.mk

@@ -43,3 +43,9 @@ ERRATA_A72_859971	:=	1
 ERRATA_A53_835769	:=	1
 ERRATA_A53_843419	:=	1
 ERRATA_A53_855873	:=	1
+
+IMX_DEBUG_UART		?= 	0
+$(eval $(call add_define,IMX_USE_UART${IMX_DEBUG_UART}))
+
+DEBUG_CONSOLE		?= 	0
+$(eval $(call add_define,DEBUG_CONSOLE))