Merge pull request #682 from sudeep-holla/gicv3_ns_intr

gicv3: disable Group1 NonSecure interrupts during core powerdown

drivers/arm/gic/v3/gicv3_main.c

@@ -280,9 +280,10 @@ void gicv3_cpuif_disable(unsigned int proc_num)
 	write_icc_igrpen0_el1(read_icc_igrpen0_el1() &
 			      ~IGRPEN1_EL1_ENABLE_G0_BIT);
 
-	/* Disable Group1 Secure interrupts */
+	/* Disable Group1 Secure and Non-Secure interrupts */
 	write_icc_igrpen1_el3(read_icc_igrpen1_el3() &
-			      ~IGRPEN1_EL3_ENABLE_G1S_BIT);
+			      ~(IGRPEN1_EL3_ENABLE_G1NS_BIT |
+			      IGRPEN1_EL3_ENABLE_G1S_BIT));
 
 	/* Synchronise accesses to group enable registers */
 	isb();