Commit 78fcbd65 authored by Sandrine Bailleux's avatar Sandrine Bailleux Committed by TrustedFirmware Code Review
Browse files

Merge "intel: Change boot source selection" into integration

parents c83d66ec 77fc4697
...@@ -46,7 +46,7 @@ const mmap_region_t agilex_plat_mmap[] = { ...@@ -46,7 +46,7 @@ const mmap_region_t agilex_plat_mmap[] = {
{0}, {0},
}; };
boot_source_type boot_source; boot_source_type boot_source = BOOT_SOURCE;
void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1, void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
u_register_t x2, u_register_t x4) u_register_t x2, u_register_t x4)
...@@ -59,7 +59,6 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1, ...@@ -59,7 +59,6 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
if (socfpga_get_handoff(&reverse_handoff_ptr)) if (socfpga_get_handoff(&reverse_handoff_ptr))
return; return;
config_pinmux(&reverse_handoff_ptr); config_pinmux(&reverse_handoff_ptr);
boot_source = reverse_handoff_ptr.boot_source;
config_clkmgr_handoff(&reverse_handoff_ptr); config_clkmgr_handoff(&reverse_handoff_ptr);
enable_nonsecure_access(); enable_nonsecure_access();
......
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
/* Platform Setting */ /* Platform Setting */
#define PLATFORM_MODEL PLAT_SOCFPGA_AGILEX #define PLATFORM_MODEL PLAT_SOCFPGA_AGILEX
#define BOOT_SOURCE BOOT_SOURCE_SDMMC
/* Register Mapping */ /* Register Mapping */
#define SOCFPGA_MMC_REG_BASE 0xff808000 #define SOCFPGA_MMC_REG_BASE 0xff808000
......
...@@ -125,7 +125,6 @@ typedef struct handoff_t { ...@@ -125,7 +125,6 @@ typedef struct handoff_t {
uint32_t misc_magic; uint32_t misc_magic;
uint32_t misc_length; uint32_t misc_length;
uint32_t _pad_0x618_0x620[2]; uint32_t _pad_0x618_0x620[2];
uint32_t boot_source;
} handoff; } handoff;
int verify_handoff_image(handoff *hoff_ptr, handoff *reverse_hoff_ptr); int verify_handoff_image(handoff *hoff_ptr, handoff *reverse_hoff_ptr);
......
...@@ -45,7 +45,7 @@ const mmap_region_t plat_stratix10_mmap[] = { ...@@ -45,7 +45,7 @@ const mmap_region_t plat_stratix10_mmap[] = {
{0}, {0},
}; };
boot_source_type boot_source; boot_source_type boot_source = BOOT_SOURCE;
void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1, void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
u_register_t x2, u_register_t x4) u_register_t x2, u_register_t x4)
...@@ -58,7 +58,6 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1, ...@@ -58,7 +58,6 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
if (socfpga_get_handoff(&reverse_handoff_ptr)) if (socfpga_get_handoff(&reverse_handoff_ptr))
return; return;
config_pinmux(&reverse_handoff_ptr); config_pinmux(&reverse_handoff_ptr);
boot_source = reverse_handoff_ptr.boot_source;
config_clkmgr_handoff(&reverse_handoff_ptr); config_clkmgr_handoff(&reverse_handoff_ptr);
enable_nonsecure_access(); enable_nonsecure_access();
......
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
/* Platform Setting */ /* Platform Setting */
#define PLATFORM_MODEL PLAT_SOCFPGA_STRATIX10 #define PLATFORM_MODEL PLAT_SOCFPGA_STRATIX10
#define BOOT_SOURCE BOOT_SOURCE_SDMMC
/* Register Mapping */ /* Register Mapping */
#define SOCFPGA_MMC_REG_BASE 0xff808000 #define SOCFPGA_MMC_REG_BASE 0xff808000
......
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