From 793c38f0fa0e17345a03181a28c5358627d0e4d9 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Wed, 24 Oct 2018 16:38:19 +0100
Subject: [PATCH] allwinner: power: Add DCDC6 power rail
The DCDC6 power rail is typically driving VDD_SYS in the SoC, so it is
on by default and uses the default voltage.
As there seems to be at least on board using a different voltage, add
the rail to the list of known voltage lines, so we can setup the right
voltage as early as possible.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
plat/allwinner/sun50i_a64/sunxi_power.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/plat/allwinner/sun50i_a64/sunxi_power.c b/plat/allwinner/sun50i_a64/sunxi_power.c
index bc796c5d6..59feed789 100644
--- a/plat/allwinner/sun50i_a64/sunxi_power.c
+++ b/plat/allwinner/sun50i_a64/sunxi_power.c
@@ -183,6 +183,7 @@ struct axp_regulator {
} regulators[] = {
{"dcdc1", 1600, 3400, 100, NO_SPLIT, 0x20, 0x10, 0},
{"dcdc5", 800, 1840, 10, 32, 0x24, 0x10, 4},
+ {"dcdc6", 600, 1520, 10, 50, 0x25, 0x10, 5},
{"dldo1", 700, 3300, 100, NO_SPLIT, 0x15, 0x12, 3},
{"dldo2", 700, 4200, 100, 27, 0x16, 0x12, 4},
{"dldo3", 700, 3300, 100, NO_SPLIT, 0x17, 0x12, 5},
--
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