From 7de544ac04848cacb30547d3e95db138896d73a9 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann <soren.brinkmann@xilinx.com> Date: Fri, 10 Jun 2016 09:57:14 -0700 Subject: [PATCH] zynqmp: Add option to select between Cadence UARTs Add build time option 'cadence1' for ZYNQMP_CONSOLE to select the 2nd UART available in the SoC. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> --- docs/plat/xilinx-zynqmp.md | 4 ++++ plat/xilinx/zynqmp/bl31_zynqmp_setup.c | 2 +- plat/xilinx/zynqmp/platform.mk | 3 +++ plat/xilinx/zynqmp/tsp/tsp_plat_setup.c | 2 +- plat/xilinx/zynqmp/zynqmp_def.h | 17 ++++++++++++++++- 5 files changed, 25 insertions(+), 3 deletions(-) diff --git a/docs/plat/xilinx-zynqmp.md b/docs/plat/xilinx-zynqmp.md index 2af841b1f..09546b012 100644 --- a/docs/plat/xilinx-zynqmp.md +++ b/docs/plat/xilinx-zynqmp.md @@ -26,6 +26,10 @@ make ERROR_DEPRECATED=1 RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=zyn * `ZYNQMP_BL32_MEM_BASE`: Specifies the base address of the bl32 binary. * `ZYNQMP_BL32_MEM_SIZE`: Specifies the size of the memory region of the bl32 binary. +* `ZYNQMP_CONSOLE`: Select the console driver. Options: + - `cadence`, `cadence0`: Cadence UART 0 + - `cadence1` : Cadence UART 1 + # FSBL->ATF Parameter Passing The FSBL populates a data structure with image information for the ATF. The ATF uses that data to hand off to the loaded images. The address of the handoff data diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c index 7b8c56700..6f1a18b10 100644 --- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c +++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c @@ -96,7 +96,7 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2, void *plat_params_from_bl2) { /* Initialize the console to provide early debug support */ - console_init(ZYNQMP_UART0_BASE, zynqmp_get_uart_clk(), + console_init(ZYNQMP_UART_BASE, zynqmp_get_uart_clk(), ZYNQMP_UART_BAUDRATE); /* Initialize the platform config for future decision making */ diff --git a/plat/xilinx/zynqmp/platform.mk b/plat/xilinx/zynqmp/platform.mk index abbb15a55..ad87cd940 100644 --- a/plat/xilinx/zynqmp/platform.mk +++ b/plat/xilinx/zynqmp/platform.mk @@ -53,6 +53,9 @@ ifdef ZYNQMP_BL32_MEM_BASE $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE)) endif +ZYNQMP_CONSOLE ?= cadence +$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE})) + PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ -Iinclude/plat/arm/common/aarch64/ \ -Iplat/xilinx/zynqmp/include/ \ diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c index d600450dd..58a3e2a18 100644 --- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c +++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c @@ -68,7 +68,7 @@ void tsp_early_platform_setup(void) * Initialize a different console than already in use to display * messages from TSP */ - console_init(ZYNQMP_UART0_BASE, zynqmp_get_uart_clk(), + console_init(ZYNQMP_UART_BASE, zynqmp_get_uart_clk(), ZYNQMP_UART_BAUDRATE); /* Initialize the platform config for future decision making */ diff --git a/plat/xilinx/zynqmp/zynqmp_def.h b/plat/xilinx/zynqmp/zynqmp_def.h index 4ff1f468c..4bb332e0c 100644 --- a/plat/xilinx/zynqmp/zynqmp_def.h +++ b/plat/xilinx/zynqmp/zynqmp_def.h @@ -33,6 +33,13 @@ #include <common_def.h> +#define ZYNQMP_CONSOLE_ID_cadence 1 +#define ZYNQMP_CONSOLE_ID_cadence0 1 +#define ZYNQMP_CONSOLE_ID_cadence1 2 +#define ZYNQMP_CONSOLE_ID_dcc 3 + +#define ZYNQMP_CONSOLE_IS(con) (ZYNQMP_CONSOLE_ID_ ## con == ZYNQMP_CONSOLE) + /* Firmware Image Package */ #define ZYNQMP_PRIMARY_CPU 0 @@ -141,7 +148,15 @@ #define ZYNQMP_UART0_BASE 0xFF000000 #define ZYNQMP_UART1_BASE 0xFF001000 -#define PLAT_ARM_CRASH_UART_BASE ZYNQMP_UART0_BASE +#if ZYNQMP_CONSOLE_IS(cadence) +# define ZYNQMP_UART_BASE ZYNQMP_UART0_BASE +#elif ZYNQMP_CONSOLE_IS(cadence1) +# define ZYNQMP_UART_BASE ZYNQMP_UART1_BASE +#else +# error "invalid ZYNQMP_CONSOLE" +#endif + +#define PLAT_ARM_CRASH_UART_BASE ZYNQMP_UART_BASE /* impossible to call C routine how it is done now - hardcode any value */ #define PLAT_ARM_CRASH_UART_CLK_IN_HZ 100000000 /* FIXME */ -- GitLab