Commit 83fc4a93 authored by Yatharth Kochar's avatar Yatharth Kochar
Browse files

AArch32: Add ARM platform changes in BL1

This patch adds ARM platform changes in BL1 for AArch32 state.
It also enables building of BL1 for ARCH=aarch32.

Change-Id: I079be81a93d027f37b0f7d8bb474b1252bb4cf48
parent f3b4914b
...@@ -517,13 +517,13 @@ endif ...@@ -517,13 +517,13 @@ endif
################################################################################ ################################################################################
# Include BL specific makefiles # Include BL specific makefiles
################################################################################ ################################################################################
# BL31 is not needed and BL1, BL2 & BL2U are not currently supported in AArch32
ifneq (${ARCH},aarch32)
ifdef BL1_SOURCES ifdef BL1_SOURCES
NEED_BL1 := yes NEED_BL1 := yes
include bl1/bl1.mk include bl1/bl1.mk
endif endif
# For AArch32, BL31 is not applicable, and BL2 & BL2U are not supported at present.
ifneq (${ARCH},aarch32)
ifdef BL2_SOURCES ifdef BL2_SOURCES
NEED_BL2 := yes NEED_BL2 := yes
include bl2/bl2.mk include bl2/bl2.mk
......
...@@ -113,8 +113,8 @@ endif ...@@ -113,8 +113,8 @@ endif
BL1_SOURCES += drivers/io/io_semihosting.c \ BL1_SOURCES += drivers/io/io_semihosting.c \
lib/semihosting/semihosting.c \ lib/semihosting/semihosting.c \
lib/semihosting/aarch64/semihosting_call.S \ lib/semihosting/${ARCH}/semihosting_call.S \
plat/arm/board/fvp/aarch64/fvp_helpers.S \ plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
plat/arm/board/fvp/fvp_bl1_setup.c \ plat/arm/board/fvp/fvp_bl1_setup.c \
plat/arm/board/fvp/fvp_err.c \ plat/arm/board/fvp/fvp_err.c \
plat/arm/board/fvp/fvp_io_storage.c \ plat/arm/board/fvp/fvp_io_storage.c \
......
...@@ -132,7 +132,11 @@ void arm_bl1_plat_arch_setup(void) ...@@ -132,7 +132,11 @@ void arm_bl1_plat_arch_setup(void)
BL1_COHERENT_RAM_LIMIT BL1_COHERENT_RAM_LIMIT
#endif #endif
); );
#ifdef AARCH32
enable_mmu_secure(0);
#else
enable_mmu_el3(0); enable_mmu_el3(0);
#endif /* AARCH32 */
} }
void bl1_plat_arch_setup(void) void bl1_plat_arch_setup(void)
......
...@@ -116,7 +116,7 @@ BL1_SOURCES += drivers/arm/sp805/sp805.c \ ...@@ -116,7 +116,7 @@ BL1_SOURCES += drivers/arm/sp805/sp805.c \
drivers/io/io_storage.c \ drivers/io/io_storage.c \
plat/arm/common/arm_bl1_setup.c \ plat/arm/common/arm_bl1_setup.c \
plat/arm/common/arm_io_storage.c \ plat/arm/common/arm_io_storage.c \
plat/common/aarch64/platform_up_stack.S plat/common/${ARCH}/platform_up_stack.S
ifdef EL3_PAYLOAD_BASE ifdef EL3_PAYLOAD_BASE
# Need the arm_program_trusted_mailbox() function to release secondary CPUs from # Need the arm_program_trusted_mailbox() function to release secondary CPUs from
# their holding pen # their holding pen
......
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