diff --git a/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S b/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
index 06dfea95b2c999e503789c3a4356f6c9def532e9..22bdffcae1f0ea38873020e95a5f49804828f48e 100644
--- a/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
+++ b/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S
@@ -19,6 +19,28 @@
 
 pmusram_entry_func pmu_cpuson_entrypoint
 
+#if PSRAM_CHECK_WAKEUP_CPU
+check_wake_cpus:
+	mrs	x0, MPIDR_EL1
+	and	x1, x0, #MPIDR_CPU_MASK
+	and	x0, x0, #MPIDR_CLUSTER_MASK
+	orr	x0, x0, x1
+
+	/* primary_cpu */
+	ldr	w1, boot_mpidr
+	cmp	w0, w1
+	b.eq	sys_wakeup
+
+	/*
+	 * If the core is not the primary cpu,
+	 * force the core into wfe.
+	 */
+wfe_loop:
+	wfe
+	b	wfe_loop
+sys_wakeup:
+#endif
+
 #if PSRAM_DO_DDR_RESUME
 ddr_resume:
 	ldr	x2, =__bl31_sram_stack_end
diff --git a/plat/rockchip/rk3328/include/platform_def.h b/plat/rockchip/rk3328/include/platform_def.h
index 9b192884e3cdfc0cd23e372436c75b55806482da..7304dcfad8fa6af922130fa5c2d048b5c56e077a 100644
--- a/plat/rockchip/rk3328/include/platform_def.h
+++ b/plat/rockchip/rk3328/include/platform_def.h
@@ -121,5 +121,6 @@
 #define PLAT_RK_PRIMARY_CPU	0x0
 
 #define PSRAM_DO_DDR_RESUME	0
+#define PSRAM_CHECK_WAKEUP_CPU	0
 
 #endif /* __PLATFORM_DEF_H__ */
diff --git a/plat/rockchip/rk3368/include/platform_def.h b/plat/rockchip/rk3368/include/platform_def.h
index 4ad3445dbda0c11fde8ca546df57292893deb23f..07b91e2683f3c0564771c47ee61fb3ebb5b793f3 100644
--- a/plat/rockchip/rk3368/include/platform_def.h
+++ b/plat/rockchip/rk3368/include/platform_def.h
@@ -123,5 +123,6 @@
 #define PLAT_RK_PRIMARY_CPU	0x0
 
 #define PSRAM_DO_DDR_RESUME	0
+#define PSRAM_CHECK_WAKEUP_CPU	0
 
 #endif /* __PLATFORM_DEF_H__ */
diff --git a/plat/rockchip/rk3399/include/platform_def.h b/plat/rockchip/rk3399/include/platform_def.h
index 49372298a2affa7acd08f0e30032aecc4fd58c5b..3df2f7dc075c92d88fc4540d381af097e6f218fb 100644
--- a/plat/rockchip/rk3399/include/platform_def.h
+++ b/plat/rockchip/rk3399/include/platform_def.h
@@ -108,4 +108,6 @@
 #define PLAT_RK_PRIMARY_CPU		0x0
 
 #define PSRAM_DO_DDR_RESUME	1
+#define PSRAM_CHECK_WAKEUP_CPU	0
+
 #endif /* __PLATFORM_DEF_H__ */