Commit 8975f317 authored by Jolly Shah's avatar Jolly Shah
Browse files

zynqmp: pm: Buffer the PLL mode that is set using IOCTL API



When linux calls pm_ioctl_set_pll_frac_mode() it doesn't expect the
fractional mode to be changed in hardware. Furthermore, even before this
patch setting the mode which is done by writing into register takes
no effect until the PLL reset is deasserted, i.e. until linux "enables"
the PLL. To adjust the code to system-level PLL EEMI API and avoid
unnecessary IPIs that would otherwise be issued, we buffer the mode
value set via IOCTL until the PLL mode really needs to be set.
Signed-off-by: default avatarMirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: default avatarWill Wong <WILLW@xilinx.com>
Signed-off-by: default avatarJolly Shah <jollys@xilinx.com>
parent cf1769b5
......@@ -2493,10 +2493,12 @@ enum pm_ret_status pm_api_clock_get_attributes(unsigned int clock_id,
* implemented by linux to system-level EEMI APIs
* @nid: PLL node ID
* @cid: PLL clock ID
* @mode: PLL mode currently set via IOCTL (PLL_FRAC_MODE/PLL_INT_MODE)
*/
struct pm_pll {
const enum pm_node_id nid;
const enum clock_id cid;
uint8_t mode;
};
static struct pm_pll pm_plls[] = {
......@@ -3130,38 +3132,24 @@ enum pm_ret_status pm_api_clock_getparent(unsigned int clock_id,
}
/**
* pm_api_clk_set_pll_mode() - Set PLL mode
* @pll PLL id
* @mode Mode fraction/integar
* pm_clock_set_pll_mode() - Set PLL mode
* @clock_id PLL clock id
* @mode Mode fractional/integer
*
* This function sets PLL mode.
* This function buffers/saves the PLL mode that is set.
*
* @return Returns status, either success or error+reason
* @return Success if mode is buffered or error if an argument is invalid
*/
enum pm_ret_status pm_api_clk_set_pll_mode(unsigned int pll,
enum pm_ret_status pm_clock_set_pll_mode(enum clock_id clock_id,
unsigned int mode)
{
enum pm_ret_status ret = PM_RET_SUCCESS;
unsigned int reg;
if (!pm_clock_valid(pll))
return PM_RET_ERROR_ARGS;
if (pm_clock_type(pll) != CLK_TYPE_OUTPUT)
return PM_RET_ERROR_NOTSUPPORTED;
if (!ISPLL(pll))
return PM_RET_ERROR_NOTSUPPORTED;
struct pm_pll *pll = pm_clock_get_pll(clock_id);
if (mode != PLL_FRAC_MODE && mode != PLL_INT_MODE)
if (!pll || (mode != PLL_FRAC_MODE && mode != PLL_INT_MODE))
return PM_RET_ERROR_ARGS;
pll->mode = mode;
reg = clocks[pll].control_reg + PLL_FRAC_OFFSET;
ret = pm_mmio_write(reg, PLL_FRAC_MODE_MASK,
mode << PLL_FRAC_MODE_SHIFT);
return ret;
return PM_RET_SUCCESS;
}
/**
......
......@@ -308,7 +308,7 @@ enum pm_ret_status pm_api_clock_setparent(unsigned int clock_id,
unsigned int parent_idx);
enum pm_ret_status pm_api_clock_getparent(unsigned int clock_id,
unsigned int *parent_idx);
enum pm_ret_status pm_api_clk_set_pll_mode(unsigned int pll,
enum pm_ret_status pm_clock_set_pll_mode(enum clock_id clock_id,
unsigned int mode);
enum pm_ret_status pm_api_clk_get_pll_mode(unsigned int pll,
unsigned int *mode);
......
......@@ -332,7 +332,7 @@ reset_release:
/**
* pm_ioctl_set_pll_frac_mode() - Ioctl function for
* setting pll mode
* @pll PLL id
* @pll PLL clock id
* @mode Mode fraction/integar
*
* This function sets PLL mode
......@@ -342,7 +342,7 @@ reset_release:
static enum pm_ret_status pm_ioctl_set_pll_frac_mode
(unsigned int pll, unsigned int mode)
{
return pm_api_clk_set_pll_mode(pll, mode);
return pm_clock_set_pll_mode(pll, mode);
}
/**
......
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