Commit 8d297cc9 authored by danh-arm's avatar danh-arm
Browse files

Merge pull request #455 from jcastillo-arm/jc/fvp_delay_timer

Fix SP804 delay timer on FVP
parents f879f002 540a5ba8
...@@ -38,7 +38,7 @@ ...@@ -38,7 +38,7 @@
* The driver must be initialized with a structure that provides a * The driver must be initialized with a structure that provides a
* function pointer to return the timer value and a clock * function pointer to return the timer value and a clock
* multiplier/divider. The ratio of the multiplier and the divider is * multiplier/divider. The ratio of the multiplier and the divider is
* the clock frequency in MHz. * the clock period in microseconds.
********************************************************************/ ********************************************************************/
typedef struct timer_ops { typedef struct timer_ops {
......
...@@ -112,6 +112,13 @@ ...@@ -112,6 +112,13 @@
#define V2M_SP804_TIMER0_BASE 0x1C110000 #define V2M_SP804_TIMER0_BASE 0x1C110000
#define V2M_SP804_TIMER1_BASE 0x1C120000 #define V2M_SP804_TIMER1_BASE 0x1C120000
/* SP810 controller */
#define V2M_SP810_BASE 0x1c020000
#define V2M_SP810_CTRL_TIM0_SEL (1 << 15)
#define V2M_SP810_CTRL_TIM1_SEL (1 << 17)
#define V2M_SP810_CTRL_TIM2_SEL (1 << 19)
#define V2M_SP810_CTRL_TIM3_SEL (1 << 21)
#define V2M_MAP_FLASH0_RW MAP_REGION_FLAT(V2M_FLASH0_BASE,\ #define V2M_MAP_FLASH0_RW MAP_REGION_FLAT(V2M_FLASH0_BASE,\
V2M_FLASH0_SIZE, \ V2M_FLASH0_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE) MT_DEVICE | MT_RW | MT_SECURE)
......
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
*/ */
#include <mmio.h>
#include <plat_arm.h> #include <plat_arm.h>
#include <sp804_delay_timer.h> #include <sp804_delay_timer.h>
#include <v2m_def.h> #include <v2m_def.h>
...@@ -47,6 +48,10 @@ void bl2_platform_setup(void) ...@@ -47,6 +48,10 @@ void bl2_platform_setup(void)
{ {
arm_bl2_platform_setup(); arm_bl2_platform_setup();
/* Enable the clock override for SP804 timer 0, which means that no
* clock dividers are applied and the raw (35 MHz) clock will be used */
mmio_write_32(V2M_SP810_BASE, FVP_SP810_CTRL_TIM0_OV);
/* Initialize delay timer driver using SP804 dual timer 0 */ /* Initialize delay timer driver using SP804 dual timer 0 */
sp804_timer_init(V2M_SP804_TIMER0_BASE, sp804_timer_init(V2M_SP804_TIMER0_BASE,
SP804_TIMER_CLKMULT, SP804_TIMER_CLKDIV); SP804_TIMER_CLKMULT, SP804_TIMER_CLKDIV);
......
...@@ -96,8 +96,14 @@ ...@@ -96,8 +96,14 @@
#define PWRC_BASE 0x1c100000 #define PWRC_BASE 0x1c100000
/* FVP SP804 timer frequency is 35 MHz*/ /* FVP SP804 timer frequency is 35 MHz*/
#define SP804_TIMER_CLKMULT 35 #define SP804_TIMER_CLKMULT 1
#define SP804_TIMER_CLKDIV 1 #define SP804_TIMER_CLKDIV 35
/* SP810 controller. FVP specific flags */
#define FVP_SP810_CTRL_TIM0_OV (1 << 16)
#define FVP_SP810_CTRL_TIM1_OV (1 << 18)
#define FVP_SP810_CTRL_TIM2_OV (1 << 20)
#define FVP_SP810_CTRL_TIM3_OV (1 << 22)
/******************************************************************************* /*******************************************************************************
* GIC-400 & interrupt handling related constants * GIC-400 & interrupt handling related constants
......
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