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adam.huang
Arm Trusted Firmware
Commits
8dc395e3
Unverified
Commit
8dc395e3
authored
Dec 06, 2018
by
Antonio Niño Díaz
Committed by
GitHub
Dec 06, 2018
Browse files
Merge pull request #1706 from Yann-lms/mmc_init_check
MMC init check and STM32MP1 MMC driver improvements
parents
19b56cf4
1d7bcaa6
Changes
3
Show whitespace changes
Inline
Side-by-side
drivers/mmc/mmc.c
View file @
8dc395e3
...
...
@@ -386,7 +386,10 @@ static int mmc_send_op_cond(void)
int
ret
,
n
;
unsigned
int
resp_data
[
4
];
mmc_reset_to_idle
();
ret
=
mmc_reset_to_idle
();
if
(
ret
!=
0
)
{
return
ret
;
};
for
(
n
=
0
;
n
<
SEND_OP_COND_MAX_RETRIES
;
n
++
)
{
ret
=
mmc_send_cmd
(
MMC_CMD
(
1
),
OCR_SECTOR_MODE
|
...
...
@@ -416,7 +419,10 @@ static int mmc_enumerate(unsigned int clk, unsigned int bus_width)
ops
->
init
();
mmc_reset_to_idle
();
ret
=
mmc_reset_to_idle
();
if
(
ret
!=
0
)
{
return
ret
;
};
if
(
mmc_dev_info
->
mmc_dev_type
==
MMC_IS_EMMC
)
{
ret
=
mmc_send_op_cond
();
...
...
drivers/st/mmc/stm32_sdmmc2.c
View file @
8dc395e3
...
...
@@ -97,7 +97,7 @@
#define SDMMC_STAR_CMDSENT BIT(7)
#define SDMMC_STAR_DATAEND BIT(8)
#define SDMMC_STAR_DBCKEND BIT(10)
#define SDMMC_STAR_DPSMACT BIT(1
1
)
#define SDMMC_STAR_DPSMACT BIT(1
2
)
#define SDMMC_STAR_RXFIFOHF BIT(15)
#define SDMMC_STAR_RXFIFOE BIT(19)
#define SDMMC_STAR_IDMATE BIT(27)
...
...
@@ -266,21 +266,22 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
mmio_write_32
(
base
+
SDMMC_CMDR
,
cmd_reg
);
start
=
get_timer
(
0
);
do
{
status
=
mmio_read_32
(
base
+
SDMMC_STAR
);
start
=
get_timer
(
0
);
while
((
status
&
flags_cmd
)
==
0U
)
{
if
(
get_timer
(
start
)
>
TIMEOUT_10_MS
)
{
err
=
-
ETIMEDOUT
;
ERROR
(
"%s: timeout 10ms (cmd = %d,status = %x)
\n
"
,
__func__
,
cmd
->
cmd_idx
,
status
);
break
;
goto
err_exit
;
}
status
=
mmio_read_32
(
base
+
SDMMC_STAR
);
}
}
while
((
status
&
flags_cmd
)
==
0U
);
if
(((
status
&
(
SDMMC_STAR_CTIMEOUT
|
SDMMC_STAR_CCRCFAIL
))
!=
0U
)
&&
(
err
==
0
))
{
if
((
status
&
(
SDMMC_STAR_CTIMEOUT
|
SDMMC_STAR_CCRCFAIL
))
!=
0U
)
{
if
((
status
&
SDMMC_STAR_CTIMEOUT
)
!=
0U
)
{
err
=
-
ETIMEDOUT
;
/*
...
...
@@ -300,9 +301,11 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
ERROR
(
"%s: CRCFAIL (cmd = %d,status = %x)
\n
"
,
__func__
,
cmd
->
cmd_idx
,
status
);
}
goto
err_exit
;
}
if
((
(
cmd_reg
&
SDMMC_CMDR_WAITRESP
)
!=
0U
)
&&
(
err
==
0
))
{
if
((
cmd_reg
&
SDMMC_CMDR_WAITRESP
)
!=
0U
)
{
if
((
cmd
->
cmd_idx
==
MMC_CMD
(
9
))
&&
((
cmd_reg
&
SDMMC_CMDR_WAITRESP
)
==
SDMMC_CMDR_WAITRESP
))
{
/* Need to invert response to match CSD structure */
...
...
@@ -324,32 +327,26 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
}
}
if
((
flags_data
==
0U
)
||
(
err
!=
0
))
{
if
(
flags_data
!=
0U
)
{
mmio_clrbits_32
(
base
+
SDMMC_CMDR
,
SDMMC_CMDR_CMDTRANS
);
}
if
(
flags_data
==
0U
)
{
mmio_write_32
(
base
+
SDMMC_ICR
,
SDMMC_STATIC_FLAGS
);
if
((
err
!=
0
)
&&
(
flags_data
!=
0U
))
{
return
stm32_sdmmc2_stop_transfer
();
return
0
;
}
return
err
;
}
status
=
mmio_read_32
(
base
+
SDMMC_STAR
);
start
=
get_timer
(
0
);
do
{
status
=
mmio_read_32
(
base
+
SDMMC_STAR
);
while
((
status
&
flags_data
)
==
0U
)
{
if
(
get_timer
(
start
)
>
TIMEOUT_10_MS
)
{
ERROR
(
"%s: timeout 10ms (cmd = %d,status = %x)
\n
"
,
__func__
,
cmd
->
cmd_idx
,
status
);
err
=
-
ETIMEDOUT
;
break
;
goto
err_exit
;
}
}
while
((
status
&
flags_data
)
==
0U
);
status
=
mmio_read_32
(
base
+
SDMMC_STAR
);
};
if
((
status
&
(
SDMMC_STAR_DTIMEOUT
|
SDMMC_STAR_DCRCFAIL
|
SDMMC_STAR_TXUNDERR
|
SDMMC_STAR_RXOVERR
|
...
...
@@ -359,11 +356,16 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
err
=
-
EIO
;
}
err_exit:
mmio_write_32
(
base
+
SDMMC_ICR
,
SDMMC_STATIC_FLAGS
);
mmio_clrbits_32
(
base
+
SDMMC_CMDR
,
SDMMC_CMDR_CMDTRANS
);
if
(
err
!=
0
)
{
return
stm32_sdmmc2_stop_transfer
();
int
ret_stop
=
stm32_sdmmc2_stop_transfer
();
if
(
ret_stop
!=
0
)
{
return
ret_stop
;
}
}
return
err
;
...
...
plat/st/stm32mp1/bl2_io_storage.c
View file @
8dc395e3
...
...
@@ -282,7 +282,11 @@ void stm32mp1_io_setup(void)
}
params
.
device_info
=
&
device_info
;
stm32_sdmmc2_mmc_init
(
&
params
);
if
(
stm32_sdmmc2_mmc_init
(
&
params
)
!=
0
)
{
ERROR
(
"SDMMC%u init failed
\n
"
,
boot_context
->
boot_interface_instance
);
panic
();
}
/* Open MMC as a block device to read GPT table */
io_result
=
register_io_dev_block
(
&
mmc_dev_con
);
...
...
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