Commit 8e53ec53 authored by Jimmy Huang's avatar Jimmy Huang Committed by Yidi Lin
Browse files

mt8173: support big/Little cluster power off for CPU idle(C2 state)



1. add power control for both big and Little cluster in MCDI
2. fix incorrect PCM_HOTPLUG_VALID_MASK in spm_hotplug.c
3. check the power status of cpus in cluster before setting the cputop
   power control

Change-Id: Ifa85306a8bc218098667247904d281494c2f7bfe
Signed-off-by: default avatarWeiyi Lu <weiyi.lu@mediatek.com>
parent 3c454d52
...@@ -40,7 +40,7 @@ ...@@ -40,7 +40,7 @@
* This driver controls the cpu power in cpu hotplug flow. * This driver controls the cpu power in cpu hotplug flow.
*/ */
#define PCM_HOTPLUG_VALID_MASK 0x00ff0000 #define PCM_HOTPLUG_VALID_MASK 0x0000ff00
#define PCM_HOTPLUG_VALID_SHIFT 0x8 #define PCM_HOTPLUG_VALID_SHIFT 0x8
/********************************************************** /**********************************************************
......
This diff is collapsed.
...@@ -31,9 +31,7 @@ ...@@ -31,9 +31,7 @@
#define __SPM_MCDI_H__ #define __SPM_MCDI_H__
void spm_mcdi_wakeup_all_cores(void); void spm_mcdi_wakeup_all_cores(void);
void spm_mcdi_wfi_sel_enter(unsigned long mpidr); void spm_mcdi_prepare_for_off_state(unsigned long mpidr, unsigned int afflvl);
void spm_mcdi_wfi_sel_leave(unsigned long mpidr); void spm_mcdi_finish_for_on_state(unsigned long mpidr, unsigned int afflvl);
void spm_mcdi_prepare(unsigned long mpidr);
void spm_mcdi_finish(unsigned long mpidr);
#endif /* __SPM_MCDI_H__ */ #endif /* __SPM_MCDI_H__ */
...@@ -380,8 +380,8 @@ static void plat_affinst_suspend(unsigned long sec_entrypoint, ...@@ -380,8 +380,8 @@ static void plat_affinst_suspend(unsigned long sec_entrypoint,
mmio_write_32(rv, sec_entrypoint); mmio_write_32(rv, sec_entrypoint);
if (afflvl == MPIDR_AFFLVL0) if (afflvl < MPIDR_AFFLVL2)
spm_mcdi_prepare(mpidr); spm_mcdi_prepare_for_off_state(mpidr, afflvl);
if (afflvl >= MPIDR_AFFLVL0) if (afflvl >= MPIDR_AFFLVL0)
mt_platform_save_context(mpidr); mt_platform_save_context(mpidr);
...@@ -390,12 +390,10 @@ static void plat_affinst_suspend(unsigned long sec_entrypoint, ...@@ -390,12 +390,10 @@ static void plat_affinst_suspend(unsigned long sec_entrypoint,
if (afflvl >= MPIDR_AFFLVL1) { if (afflvl >= MPIDR_AFFLVL1) {
/* Disable coherency if this cluster is to be turned off */ /* Disable coherency if this cluster is to be turned off */
plat_cci_disable(); plat_cci_disable();
disable_scu(mpidr);
trace_power_flow(mpidr, CLUSTER_SUSPEND);
} }
if (afflvl >= MPIDR_AFFLVL2) { if (afflvl >= MPIDR_AFFLVL2) {
disable_scu(mpidr);
generic_timer_backup(); generic_timer_backup();
spm_system_suspend(); spm_system_suspend();
/* Prevent interrupts from spuriously waking up this cpu */ /* Prevent interrupts from spuriously waking up this cpu */
...@@ -420,8 +418,6 @@ static void plat_affinst_on_finish(unsigned int afflvl, unsigned int state) ...@@ -420,8 +418,6 @@ static void plat_affinst_on_finish(unsigned int afflvl, unsigned int state)
/* Perform the common cluster specific operations */ /* Perform the common cluster specific operations */
if (afflvl >= MPIDR_AFFLVL1) { if (afflvl >= MPIDR_AFFLVL1) {
enable_scu(mpidr);
/* Enable coherency if this cluster was off */ /* Enable coherency if this cluster was off */
plat_cci_enable(); plat_cci_enable();
trace_power_flow(mpidr, CLUSTER_UP); trace_power_flow(mpidr, CLUSTER_UP);
...@@ -451,22 +447,20 @@ static void plat_affinst_suspend_finish(unsigned int afflvl, unsigned int state) ...@@ -451,22 +447,20 @@ static void plat_affinst_suspend_finish(unsigned int afflvl, unsigned int state)
arm_gic_setup(); arm_gic_setup();
arm_gic_cpuif_setup(); arm_gic_cpuif_setup();
spm_system_suspend_finish(); spm_system_suspend_finish();
enable_scu(mpidr);
} }
/* Perform the common cluster specific operations */ /* Perform the common cluster specific operations */
if (afflvl >= MPIDR_AFFLVL1) { if (afflvl >= MPIDR_AFFLVL1) {
enable_scu(mpidr);
/* Enable coherency if this cluster was off */ /* Enable coherency if this cluster was off */
plat_cci_enable(); plat_cci_enable();
trace_power_flow(mpidr, CLUSTER_UP);
} }
if (afflvl >= MPIDR_AFFLVL0) if (afflvl >= MPIDR_AFFLVL0)
mt_platform_restore_context(mpidr); mt_platform_restore_context(mpidr);
if (afflvl == MPIDR_AFFLVL0) if (afflvl < MPIDR_AFFLVL2)
spm_mcdi_finish(mpidr); spm_mcdi_finish_for_on_state(mpidr, afflvl);
arm_gic_pcpu_distif_setup(); arm_gic_pcpu_distif_setup();
} }
......
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