Merge changes from topic "tegra-downstream-03192020" into integration

* changes:
  Tegra194: move cluster and CPU counter to header file.
  Tegra: gicv2: initialize target masks
  spd: tlkd: support new TLK SMCs for RPMB service
  Tegra210: trigger CPU0 hotplug power on using FC
  Tegra: memctrl: cleanup streamid override registers
  Tegra: memctrl_v2: remove support to secure TZSRAM
  Tegra: include platform headers from individual makefiles
  Tegra210: rename ENABLE_WDT_LEGACY_FIQ_HANDLING macro
  Tegra194: SiP function ID to read SMMU_PER registers
  Tegra: memctrl: map video memory as uncached
  Tegra: remove support for USE_COHERENT_MEM
  Tegra: remove circular dependency with common_def.h
  Tegra: include missing stdbool.h
  Tegra: remove support for SEPARATE_CODE_AND_RODATA=0

plat/nvidia/tegra/soc/t210/plat_psci_handlers.c

@@ -533,6 +533,13 @@ int tegra_soc_pwr_domain_on_finish(const psci_power_state_t *target_state)
 		}
 	}
 
+	/*
+	 * Mark this CPU as ON in the cpu_powergate_mask[],
+	 * so that we use Flow Controller for all subsequent
+	 * power ups.
+	 */
+	cpu_powergate_mask[plat_my_core_pos()] = 1;
+
 	/*
 	 * T210 has a dedicated ARMv7 boot and power mgmt processor, BPMP. It's
 	 * used for power management and boot purposes. Inform the BPMP that
@@ -561,7 +568,6 @@ int tegra_soc_pwr_domain_on(u_register_t mpidr)
 	/* Turn on CPU using flow controller or PMC */
 	if (cpu_powergate_mask[cpu] == 0) {
 		tegra_pmc_cpu_on(cpu);
-		cpu_powergate_mask[cpu] = 1;
 	} else {
 		tegra_fc_cpu_on(cpu);
 	}

plat/nvidia/tegra/soc/t210/platform_t210.mk

@@ -23,10 +23,10 @@ $(eval $(call add_define,MAX_XLAT_TABLES))
 MAX_MMAP_REGIONS			:= 16
 $(eval $(call add_define,MAX_MMAP_REGIONS))
 
-ENABLE_WDT_LEGACY_FIQ_HANDLING		:= 1
-$(eval $(call add_define,ENABLE_WDT_LEGACY_FIQ_HANDLING))
+ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING	:= 1
 
-PLAT_INCLUDES		+=	-I${SOC_DIR}/drivers/se
+PLAT_INCLUDES		+=	-Iplat/nvidia/tegra/include/t210 \
+				-I${SOC_DIR}/drivers/se
 
 BL31_SOURCES		+=	drivers/ti/uart/aarch64/16550_console.S		\
 				lib/cpus/aarch64/cortex_a53.S			\

services/spd/tlkd/tlkd_main.c

@@ -272,6 +272,9 @@ static uintptr_t tlkd_smc_handler(uint32_t smc_fid,
 	case TLK_TA_LAUNCH_OP:
 	case TLK_TA_SEND_EVENT:
 	case TLK_RESUME_FID:
+	case TLK_SET_BL_VERSION:
+	case TLK_LOCK_BL_INTERFACE:
+	case TLK_BL_RPMB_SERVICE:
 
 		if (!ns)
 			SMC_RET1(handle, SMC_UNK);