From 92e6e4df5bf40bb420c54ea96dbe2fcc2651a860 Mon Sep 17 00:00:00 2001
From: Achin Gupta <achin.gupta@arm.com>
Date: Fri, 9 May 2014 13:33:42 +0100
Subject: [PATCH] Enable secure timer to generate S-EL1 interrupts

This patch enables secure physical timer during TSP initialisation and
maintains it across power management operations so that a timer
interrupt is generated every half second.

Fixes ARM-software/tf-issues#104
Fixes ARM-software/tf-issues#134

Change-Id: I66c6cfd24bd5e6035ba75ebf0f047e568770a369
---
 bl32/tsp/tsp_main.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c
index 4ffc5216f..3c250f81b 100644
--- a/bl32/tsp/tsp_main.c
+++ b/bl32/tsp/tsp_main.c
@@ -116,6 +116,7 @@ uint64_t tsp_main(void)
 	bl32_platform_setup();
 
 	/* Initialize secure/applications state here */
+	tsp_generic_timer_start();
 
 	/* Update this cpu's statistics */
 	tsp_stats[linear_id].smc_count++;
@@ -152,6 +153,9 @@ tsp_args_t *tsp_cpu_on_main(void)
 	uint64_t mpidr = read_mpidr();
 	uint32_t linear_id = platform_get_core_pos(mpidr);
 
+	/* Initialize secure/applications state here */
+	tsp_generic_timer_start();
+
 	/* Update this cpu's statistics */
 	tsp_stats[linear_id].smc_count++;
 	tsp_stats[linear_id].eret_count++;
@@ -185,6 +189,13 @@ tsp_args_t *tsp_cpu_off_main(uint64_t arg0,
 	uint64_t mpidr = read_mpidr();
 	uint32_t linear_id = platform_get_core_pos(mpidr);
 
+	/*
+	 * This cpu is being turned off, so disable the timer to prevent the
+	 * secure timer interrupt from interfering with power down. A pending
+	 * interrupt will be lost but we do not care as we are turning off.
+	 */
+	tsp_generic_timer_stop();
+
 	/* Update this cpu's statistics */
 	tsp_stats[linear_id].smc_count++;
 	tsp_stats[linear_id].eret_count++;
@@ -220,6 +231,13 @@ tsp_args_t *tsp_cpu_suspend_main(uint64_t power_state,
 	uint64_t mpidr = read_mpidr();
 	uint32_t linear_id = platform_get_core_pos(mpidr);
 
+	/*
+	 * Save the time context and disable it to prevent the secure timer
+	 * interrupt from interfering with wakeup from the suspend state.
+	 */
+	tsp_generic_timer_save();
+	tsp_generic_timer_stop();
+
 	/* Update this cpu's statistics */
 	tsp_stats[linear_id].smc_count++;
 	tsp_stats[linear_id].eret_count++;
@@ -255,6 +273,9 @@ tsp_args_t *tsp_cpu_resume_main(uint64_t suspend_level,
 	uint64_t mpidr = read_mpidr();
 	uint32_t linear_id = platform_get_core_pos(mpidr);
 
+	/* Restore the generic timer context */
+	tsp_generic_timer_restore();
+
 	/* Update this cpu's statistics */
 	tsp_stats[linear_id].smc_count++;
 	tsp_stats[linear_id].eret_count++;
-- 
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