Commit 93cf1f64 authored by Avinash Mehta's avatar Avinash Mehta Committed by Abdellatif El Khlifi
Browse files

corstone700: clean-up as per coding style guide



Running checkpatch.pl on the codebase and making required changes

Change-Id: I7d3f8764cef632ab2a6d3c355c68f590440b85b8
Signed-off-by: default avatarAvinash Mehta <avinash.mehta@arm.com>
Signed-off-by: default avatarAbdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
parent c6fe43b7
/* /*
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
...@@ -8,8 +8,8 @@ ...@@ -8,8 +8,8 @@
#include <plat/common/platform.h> #include <plat/common/platform.h>
/* The Corstone700 power domain tree descriptor */ /* The Corstone700 power domain tree descriptor */
static unsigned char corstone700_power_domain_tree_desc static unsigned char corstone700_power_domain_tree_desc[PLAT_ARM_CLUSTER_COUNT
[PLAT_ARM_CLUSTER_COUNT + 2]; + 2];
/******************************************************************************* /*******************************************************************************
* This function dynamically constructs the topology according to * This function dynamically constructs the topology according to
* CLUSTER_COUNT and returns it. * CLUSTER_COUNT and returns it.
......
...@@ -17,11 +17,13 @@ ...@@ -17,11 +17,13 @@
#define CORSTONE700_CLUSTER_COUNT U(1) #define CORSTONE700_CLUSTER_COUNT U(1)
#define CORSTONE700_MAX_CPUS_PER_CLUSTER U(4) #define CORSTONE700_MAX_CPUS_PER_CLUSTER U(4)
#define CORSTONE700_MAX_PE_PER_CPU U(1) #define CORSTONE700_MAX_PE_PER_CPU U(1)
#define CORSTONE700_CORE_COUNT (CORSTONE700_CLUSTER_COUNT * \
#define PLAT_ARM_CLUSTER_COUNT CORSTONE700_CLUSTER_COUNT
#define PLATFORM_CORE_COUNT (PLAT_ARM_CLUSTER_COUNT * \
CORSTONE700_MAX_CPUS_PER_CLUSTER * \ CORSTONE700_MAX_CPUS_PER_CLUSTER * \
CORSTONE700_MAX_PE_PER_CPU) CORSTONE700_MAX_PE_PER_CPU)
#define PLATFORM_CORE_COUNT CORSTONE700_CORE_COUNT
#define PLAT_ARM_CLUSTER_COUNT CORSTONE700_CLUSTER_COUNT
/* UART related constants */ /* UART related constants */
#define PLAT_ARM_BOOT_UART_BASE 0x1a510000 #define PLAT_ARM_BOOT_UART_BASE 0x1a510000
...@@ -175,8 +177,8 @@ ...@@ -175,8 +177,8 @@
#define CORSTONE700_DEVICE_BASE (0x1A000000) #define CORSTONE700_DEVICE_BASE (0x1A000000)
#define CORSTONE700_DEVICE_SIZE (0x26000000) #define CORSTONE700_DEVICE_SIZE (0x26000000)
#define CORSTONE700_MAP_DEVICE MAP_REGION_FLAT( \ #define CORSTONE700_MAP_DEVICE MAP_REGION_FLAT( \
CORSTONE700_DEVICE_BASE, \ CORSTONE700_DEVICE_BASE,\
CORSTONE700_DEVICE_SIZE, \ CORSTONE700_DEVICE_SIZE,\
MT_DEVICE | MT_RW | MT_SECURE) MT_DEVICE | MT_RW | MT_SECURE)
#define ARM_IRQ_SEC_PHY_TIMER 29 #define ARM_IRQ_SEC_PHY_TIMER 29
...@@ -222,10 +224,10 @@ ...@@ -222,10 +224,10 @@
*/ */
#define PLAT_ARM_G1S_IRQ_PROPS(grp) \ #define PLAT_ARM_G1S_IRQ_PROPS(grp) \
ARM_G1S_IRQ_PROPS(grp), \ ARM_G1S_IRQ_PROPS(grp), \
INTR_PROP_DESC(CORSTONE700_IRQ_TZ_WDOG, \ INTR_PROP_DESC(CORSTONE700_IRQ_TZ_WDOG, GIC_HIGHEST_SEC_PRIORITY, \
GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_LEVEL), \ (grp), GIC_INTR_CFG_LEVEL), \
INTR_PROP_DESC(CORSTONE700_IRQ_SEC_SYS_TIMER, \ INTR_PROP_DESC(CORSTONE700_IRQ_SEC_SYS_TIMER, \
GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_LEVEL) \ GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_LEVEL)
#define PLAT_ARM_G0_IRQ_PROPS(grp) ARM_G0_IRQ_PROPS(grp) #define PLAT_ARM_G0_IRQ_PROPS(grp) ARM_G0_IRQ_PROPS(grp)
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment